XC3090L-8PCG84C vs XC3090L-8PCG84I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng XC3090L-8PCG84C sa pamamagitan ng Xilinx at XC3090L-8PCG84I sa pamamagitan ng Xilinx. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | XC3090L-8PCG84C | XC3090L-8PCG84I |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | XC3000A/L Series FPGA | XC3000L Low-Voltage Field Programmable Gate Array |
| Logic Cells / CLBs | 70 Configurable Logic Blocks | — |
| Gate Count | 6,400 gates (typical) | — |
| Configuration Program Store | 64,160 bits | — |
| User I/O Pins | 70 (maximum) | 70 |
| Packhaging | 84-pin PLCC (J-Lead, PCG84) | 84-pin PLCC (PCG84) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (low-voltage 'L' variant) | — |
| Speed Grade | -8 (moderate) | -8 |
| Temperature na Operasyon | 0 C to +70 C (commercial 'C' suffix) | -40 °C to +85 °C (Industrial) |
| Configuration Modes | Serial master/slave, parallel master/slave, peripheral mode | — |
| Process Technology | [DATA_NEEDED: process node] | CMOS SRAM-based FPGA |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Configuration Clock Range | [DATA_NEEDED: CCLK frequency range] | — |
| Uri ng Pagpapasok | Surface Mount (PLCC J-Lead) | Through-Hole (PLCC socket) |
| Tindminan RoHS | unknown | [DATA_NEEDED: rohs compliance for legacy PLCC variant] |
| Lead-Free | unknown | [DATA_NEEDED: lead-free status for PCG84 PLCC package] |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Technology | SRAM-based, in-system reconfigurable | — |
| Usable Gates | — | 6,000 |
| Configurable Logic Blocks (CLBs) | — | 320 |
| Volte ng Pagbibigay | — | 3.3 V |
| Maximum Toggle Frequency | — | 80 MHz |
| Configuration Memory | — | SRAM (volatile, reload required at power-up) |
| I/O Standards | — | TTL, CMOS |
| Development Tool | — | XACT (Xilinx Classic), XC3000 design flow |
| Programmable Elements | — | IOBs, CLBs, Programmable Interconnect |
| Boundary Scan | — | Yes (per XC3000 family) |