XDPP1140100BXUMA1 vs XDPE19283D0000XTMA1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng XDPP1140100BXUMA1 sa pamamagitan ng Infineon at XDPE19283D0000XTMA1 sa pamamagitan ng Infineon. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Infineon
XDPP1140100BXUMA1 - 32-bit Digital DC-DC Controller, VQFN-24 | Infineon
XDPP1140100BXUMA1 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | XDPP1140100BXUMA1 | XDPE19283D0000XTMA1 |
|---|---|---|
| Brand | Infineon | Infineon |
| Kategorya | DC-DC Converters | DC-DC Converters |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Topology Support | Hard-switched full-bridge, half-bridge, push-pull, active-clamp forward, LLC | — |
| Modulation | PWM and LLC | — |
| MCU Core | 32-bit ARM Cortex-M0 | — |
| Maximum Switching Frequency | 2 MHz | — |
| Supply Voltage (VDD) | 2.97 V to 3.63 V | — |
| Temperature na Operasyon | -40C to +125C | [DATA_NEEDED: operating temperature range] |
| Packhaging | PG-VQFN-24-20 (VQFN-24, 4 mm x 4 mm) | PG-VQFN-40-13 (40-pin QFN, 5x5 mm) with exposed pad |
| Phase Support | Single phase, multi-phase with flux balancing | — |
| Gate Drive Outputs | Integrated drivers for synchronous-rectifier FETs | — |
| Analog Protection | Programmable comparators for cycle-by-cycle OCP | — |
| Communication Interfaces | I2C / UART / PMBus-compatible | — |
| Internal ADC | Multi-channel ADC for VIN/VOUT/IIN/IOUT/TEMP monitoring | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | MSL per JEDEC J-STD-020 (see datasheet) | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | Compliant | Compliant (per Infineon product page) |
| Tape and Reel Quantity | 5000 per reel | — |
| Topolohiya | — | Digital multiphase buck controller |
| Number of Loops | — | 2 (dual-loop) |
| Maximum Phases | — | 8 (configurable 8+0, 7+1, 6+2, 5+3, 4+4) |
| Hanay ng Output Volte | — | 0.25 V to 2.8 V |
| Switching Frequency Range | — | 250 kHz to 3000 kHz |
| Supported Protocol | — | AMD SVI3 |
| Communication Interface | — | PMBus / I2C (command and monitor) |
| Protection Features | — | OVP, UVP, OCP, OTP (per datasheet) |
| Current Balancing | — | Per-phase digital current sharing |
| Target CPU Platform | — | AMD SVI3 server, workstation, high-end desktop |