10AS057K4F35I3SG vs 10AS057K2F35I2SG Karşılaştırma
Ayrıntılı yan yana karşılaştırma 10AS057K4F35I3SG tarafından Altera ve 10AS057K2F35I2SG tarafından IntelAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Altera
10AS057K4F35I3SG - Arria 10 SX SoC FPGA 570K LE | Altera | Industrial
10AS057K4F35I3SG ✓ AktifÖzellik Karşılaştırması
| Parametre | 10AS057K4F35I3SG | 10AS057K2F35I2SG |
|---|---|---|
| Marka | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Aktif | Aktif |
| Series | Arria 10 SX | — |
| Device Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 570K | 570K |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Processor Clock Speed | 1.5 GHz (max) | — |
| User I/O Count | 396 | 396 (per Heisener parametric data) |
| Package Type | 1152-FBGA, FC (35x35 mm) | — |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -3 | -2 |
| Process Node | 20 nm | 20 nm TSMC |
| Montaj Türü | Surface Mount | Surface Mount (BGA) |
| RoHS Durumu | Compliant | Compliant (lead-free finish) |
| MSL Seviyesi | [DATA_NEEDED: MSL Level] | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Supply Voltage (Core) | [DATA_NEEDED: VccINT] | — |
| Transceiver Data Rate | [DATA_NEEDED: Gbps] | — |
| DSP Blocks | [DATA_NEEDED: DSP count] | [DATA_NEEDED: DSP block count] |
| Embedded Memory | [DATA_NEEDED: Mbits] | [DATA_NEEDED: M20K / MLAB bit count] |
| Lead-Free | Yes | — |
| Family | — | Arria 10 SX SoC FPGA |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Core Frequency | — | 1.5 GHz |
| Paket | — | 1152-ball FC-FBGA (F35), 35x35 mm |
| İşletim Sıcaklığı | — | -40C to +100C (Industrial) |
| Transceivers | — | [DATA_NEEDED: transceiver count and max data rate] |
| HPS Peripherals | — | EMAC, USB 2.0 OTG, SPI, I2C, NAND/NOR flash controllers, SD/MMC |
| Memory Interfaces | — | DDR3/DDR4/LPDDR3 hard controllers (Arria 10 HPS) |
| Configuration | — | FPGA + HPS independent / coordinated boot |