EP1M350F780C6 vs EP1M350F780C6N Karşılaştırma
Ayrıntılı yan yana karşılaştırma EP1M350F780C6 tarafından Intel ve EP1M350F780C6N tarafından IntelAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Son Satın AlmaÖzellik Karşılaştırması
| Parametre | EP1M350F780C6 | EP1M350F780C6N |
|---|---|---|
| Marka | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | NRND | Son Alış Zamanı |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Mercury FPGA | — |
| Logic Family | CMOS | CMOS, SRAM-based LUT |
| Number of User I/Os | 486 | — |
| Total Pins / Balls | 780 | — |
| Paket | 780-FBGA (FineLine BGA), 29 mm x 29 mm | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Montaj Türü | Surface Mount | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | 1.8 V |
| İşletim Sıcaklığı | 0 C to 85 C (TJ, commercial grade) | 0 C to 85 C |
| Integrated Transceivers | Yes, up to 1.25 Gbps with CDR support | Yes, with CDR up to 1.25 Gbps |
| Logic Elements / LUTs | [DATA_NEEDED: logic element count] | — |
| On-chip Memory | [DATA_NEEDED: embedded memory size] | — |
| RoHS Durumu | Non-compliant (per one distributor listing) | [DATA_NEEDED: rohs_status] |
| Lead Free Status | [DATA_NEEDED: lead-free status] | — |
| Package Style | Bulk tray per distributor listings | — |
| Device Type | FPGA (Field Programmable Gate Array) | Loadable Programmable Logic Device (PLD) / FPGA |
| Programmable Logic Type | In-system programmable | — |
| Family | — | Mercury (EP1M350) |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| User I/Os | — | 486 |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| MSL Seviyesi | — | [DATA_NEEDED: msl_level] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Architecture | — | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | — | 780 |