EPC16UC8B vs EPC16UC88 Karşılaştırma
Ayrıntılı yan yana karşılaştırma EPC16UC8B tarafından Intel ve EPC16UC88 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Özellik Karşılaştırması
| Parametre | EPC16UC8B | EPC16UC88 |
|---|---|---|
| Marka | Intel | Altera |
| Kategori | FPGA & CPLD | Memory ICs |
| Yaşam Döngüsü Durumu | NRND | Unknown |
| Product Type | Enhanced Configuration Device | — |
| Manufacturer | Intel (formerly Altera) | — |
| Configuration Memory Density | 16 Mb | — |
| FPGA Family Supported | Altera SRAM-based LUT FPGAs (Cyclone, Stratix, APEX) | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel Asynchronous (PPA), Passive Parallel Synchronous (PPS), Fast Passive Parallel (FPP) | — |
| Core Supply Voltage (VCC) | 3.3 V | — |
| I/O Supply Voltage (VIO) | 1.8 V / 2.5 V / 3.3 V | — |
| Programmability | In-system programmable via IEEE 1532 / JTAG | — |
| Configuration Pages | 16 pages x 1 Mb each | — |
| Paket | 8-pin QFP (UC8B suffix) | 88-UBGA (11x8) |
| Montaj Türü | Surface Mount | Surface mount |
| İşletim Sıcaklığı | [DATA_NEEDED: Operating temperature range] | [DATA_NEEDED: operating temperature] |
| MSL Seviyesi | [DATA_NEEDED: MSL rating] | — |
| RoHS Durumu | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: Lead-free status] | — |
| Handshake Pins | nSTATUS, CONF_DONE, nCONFIG, OE | — |
| Family | EPC16 (Enhanced Configuration) | — |
| Device Type | — | In-system programmable configuration PROM for FPGAs |
| Configuration Memory Capacity | — | 16 Mb |
| Besleme Gerilimi | — | 3.3 V core and I/O |
| Package Family | — | UBGA |
| In-System Programmability | — | IEEE Std. 1532 compatible |
| Programming Language Support | — | Jam Standard Test and Programming Language (STAPL) |
| JTAG Boundary Scan | — | Supported |
| nINIT_CONF Function | — | Allows private JTAG instruction to start FPGA configuration |
| Configuration Architecture | — | Configuration controller and flash memory |
| FPGA Configuration Use | — | Automatic configuration after power-up or system initialization |
| Data Output | — | Configuration data output controlled by OE and nCS |
| Output Control | — | OE and nCS control tri-state buffer and address counter |
| Package Dimensions | — | 11 mm x 8 mm |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| Output Current | — | [DATA_NEEDED: output current] |
| Configuration Frequency | — | [DATA_NEEDED: configuration frequency] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |