EPM5192LI84 vs EPM5192GI84 Karşılaştırma

Ayrıntılı yan yana karşılaştırma EPM5192LI84 tarafından Altera ve EPM5192GI84 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.

Özellik Karşılaştırması

Parametre EPM5192LI84 EPM5192GI84
Marka Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Yaşam Döngüsü Durumu Obsolete Obsolete
Device Family MAX 5000 —
Product Type UV-Erasable/OTP Complex PLD (CPLD) —
Usable Gates 3,750 gates —
Macro Cells 192 —
Maximum Toggle Frequency 40 MHz —
Pin-to-Pin Delay (tPD) 25 ns —
Supply Voltage (VCC) 5 V (single supply) —
User I/O Pins 64 (max) —
İşletim Sıcaklığı Aralığı -40 °C to +85 °C (industrial) -40 C to +85 C (industrial)
Package Type 84-pin PLCC (J-lead, package code J84/QCCJ) —
Montaj Türü Surface Mount (socket-compatible) Through-Hole (PGA socket or PCB pin/peg)
Configuration Memory OTP / UV-erasable EPROM —
Programming Method Stand-alone programmer (no JTAG on LI84 OTP variant) —
RoHS Durumu [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: most legacy PGA parts are non-RoHS]
Logic Compatibility TTL-compatible I/O —
Family — MAX 5000
Device Type — UV-Erasable / OTP Complex PLD (CPLD)
Macrocells — 192
Logic Array Blocks — [DATA_NEEDED: number of LABs]
Paket — 84-pin PGA (WPGA, square, through-hole, pin/peg terminals)
Package Code — WPGA
Operating Voltage (VCC) — 5 V (typical)
I/O Logic Compatibility — TTL
Temperature Grade — Industrial
Programmable Flip-Flop Modes — D, T, JK, SR
Programmability — UV-erasable (windowed) / OTP
Programming File Format — JEDEC map via MAX+PLUS II / A+PLUS
Propagation Delay — [DATA_NEEDED: tPD in ns]
Max User I/O Pins — [DATA_NEEDED: usable I/O count for this package]
Lead-Free — [DATA_NEEDED: legacy part, likely contains lead]
Number of Terminals — 84
Terminal Form — PIN/PEG
Package Shape — SQUARE

Dökümanlar & Kaynaklar

Tüm Ürünleri Gözden Geçir BOM Oluştur Teklif İsteyin