EPM9320LC84-15 vs EPM9320LI84-20N Karşılaştırma

Ayrıntılı yan yana karşılaştırma EPM9320LC84-15 tarafından Intel ve EPM9320LI84-20N tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.

Özellik Karşılaştırması

Parametre EPM9320LC84-15 EPM9320LI84-20N
Marka Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Yaşam Döngüsü Durumu Obsolete Obsolete
Family MAX 9000 MAX 9000
Series EPM9320 —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 320 320
Usable Gates 6,000 6,000 to 12,000
Logic Array Blocks (LABs) 20 —
Propagation Delay (tPD) 15 ns (max) 20 ns (speed grade -20)
Azami Saat Hızı 117.6 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V nominal) —
Programmability 5.0 V in-system programmable (ISP) via JTAG —
JTAG Interface IEEE Std. 1149.1 boundary-scan compliant —
Paket 84-pin PLCC (Plastic Leaded Chip Carrier) PLCC-84 (Plastic Leaded Chip Carrier, J-lead)
Montaj Türü Surface Mount —
İşletim Sıcaklığı -40C to +85C (commercial) [DATA_NEEDED: exact grade] 0 C to +70 C (commercial)
Technology CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX) —
Built-in Pull-up Resistors Yes, on every I/O pin —
Architecture Feature Pin-locking across design iterations —
RoHS Durumu [DATA_NEEDED: confirm from manufacturer] [DATA_NEEDED: RoHS compliance status]
User I/O Pins — 60
Total Pins — 84
Pin-to-Pin Delay — 16 ns (per DigChip spec block)
Maximum Counter Frequency — 118 MHz
Logic Family — CMOS, EEPROM-based
Besleme Gerilimi — 5.0 V
Programming Interface — IEEE 1149.1 JTAG, in-system programmable
Architecture — Multiple Array MatriX (MAX) - third generation
Process Technology — Advanced CMOS EEPROM

Dökümanlar & Kaynaklar

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