ATF22V10C-5JC vs ATF22V10C-5JX موازنہ
تفصیلی ساتھ ساتھ موازنہ از ATF22V10C-5JC بذریعہ Microchip Technology اور ATF22V10C-5JX بذریعہ Microchip Technology. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
Microchip Technology
ATF22V10C-5JC - 500-Gate EE PLD, 10 Macrocells, 5ns | Microchip
ATF22V10C-5JC ✓ فعالMicrochip Technology
ATF22V10C-5JX - 5ns 500-Gate EE PLD | Microchip Technology
ATF22V10C-5JX ✓ فعالخصوصیات کا موازنہ
| پیرامیٹر | ATF22V10C-5JC | ATF22V10C-5JX |
|---|---|---|
| برانڈ | Microchip Technology | Microchip Technology |
| زمرہ | Logic ICs | Logic ICs |
| لائف سائیکل کی حالت | فعال | فعال |
| Device Type | EE PLD (Electrically Erasable Programmable Logic Device) | Electrically erasable programmable logic device (EE PLD) |
| Family | ATF22V10C / 22V10 | — |
| Macrocells | 10 macrocells | — |
| Total Gates | 500 gates | — |
| Propagation Delay (tPD) | 5 ns (min, -5 speed grade) | — |
| Max Frequency | 166 MHz (per FindIC listing of device attributes) | — |
| سپلائی وولٹیج | 5 V nominal | 5 V |
| Supply Tolerance (Commercial) | 5 V +/- 5% | — |
| Supply Tolerance (Military/Industrial) | 5 V +/- 10% | — |
| Power-Down Current | 10 uA (typical) | — |
| Technology | CMOS with electrically erasable Flash configuration memory | — |
| Input Latch Feature | Yes - holds inputs to previous logic states | — |
| Fusemap Compatibility | JEDEC GAL22V10 fusemap compatible (pin-to-pin) | — |
| پیکیج | 28-PLCC (QCCJ), J-lead, 11.51 mm x 11.51 mm | 28-pin PLCC (11.51 mm x 11.51 mm) |
| Package Code | QCCJ | — |
| Terminals | 28 J-bend (J-lead) terminals | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | — |
| ماؤنٹنگ ٹائپ | Surface Mount | Surface mount |
| Programmable | Yes - in-circuit electrically erasable | — |
| RoHS اسٹیٹس | [DATA_NEEDED: RoHS compliance statement] | [DATA_NEEDED: RoHS status] |
| Datasheet Document | ATF22V10C(Q) Complete Datasheet (Microchip doc0735 PDF) | — |
| Logic Family | — | Simple programmable logic device (SPLD) |
| Configuration Memory | — | Electrically erasable Flash memory |
| Macrocell Count | — | 10 macrocells |
| Logic Capacity | — | 500 gates |
| Maximum Frequency | — | 166 MHz |
| Propagation Delay | — | 5 ns speed grade |
| Typical Low Power Dissipation | — | 10 uA |
| Lead Configuration | — | J-lead |
| Power-Down Control | — | Optional pin-controlled power-down |
| Power-Down PLCC Pin | — | Pin 5 |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |
| آپریٹنگ درجہ حرارت رینج | — | [DATA_NEEDED: operating temperature range] |