ATF22V10C-5JC vs ATF22V10C-7JC So sánh

So sánh chi tiết song song của ATF22V10C-5JC bằng Microchip Technology và ATF22V10C-7JC bằng Microchip Technology. So sánh các thông số quan trọng, thông số điện tử, gói gọn, trạng thái vòng đời, giá cả và khả năng cung cấp để xác định linh kiện tốt nhất cho yêu cầu thiết kế của bạn.

Microchip Technology
ATF22V10C-5JC ATF22V10C-5JC - 500-Gate EE PLD, 10 Macrocells, 5ns | Microchip

ATF22V10C-5JC - 500-Gate EE PLD, 10 Macrocells, 5ns | Microchip

ATF22V10C-5JC ✓ Hoạt động
Microchip Technology
ATF22V10C-7JC ATF22V10C-7JC - 500-Gate 7 ns EE PLD | Microchip Technology

ATF22V10C-7JC - 500-Gate 7 ns EE PLD | Microchip Technology

ATF22V10C-7JC Unknown

So sánh thông số kỹ thuật

Tham số ATF22V10C-5JC ATF22V10C-7JC
Thương hiệu Microchip Technology Microchip Technology
Danh mục Logic ICs Logic ICs
Trạng thái vòng đời Hoạt động Unknown
Device Type EE PLD (Electrically Erasable Programmable Logic Device) 22V10-series electrically erasable programmable logic device
Family ATF22V10C / 22V10 —
Macrocells 10 macrocells 10 macrocells
Total Gates 500 gates —
Propagation Delay (tPD) 5 ns (min, -5 speed grade) —
Max Frequency 166 MHz (per FindIC listing of device attributes) —
Điện áp cung cấp 5 V nominal 5 V
Supply Tolerance (Commercial) 5 V +/- 5% —
Supply Tolerance (Military/Industrial) 5 V +/- 10% —
Power-Down Current 10 uA (typical) —
Technology CMOS with electrically erasable Flash configuration memory CMOS electrically erasable flash-memory technology
Input Latch Feature Yes - holds inputs to previous logic states —
Fusemap Compatibility JEDEC GAL22V10 fusemap compatible (pin-to-pin) —
Hộp 28-PLCC (QCCJ), J-lead, 11.51 mm x 11.51 mm 28-pin PLCC
Package Code QCCJ —
Terminals 28 J-bend (J-lead) terminals —
Package Shape Square —
Temperature Grade Commercial Industrial temperature
Kiểu lắp đặt Surface Mount Surface mount
Programmable Yes - in-circuit electrically erasable —
Trạng thái RoHS [DATA_NEEDED: RoHS compliance statement] [DATA_NEEDED: RoHS status]
Datasheet Document ATF22V10C(Q) Complete Datasheet (Microchip doc0735 PDF) —
Programmable Logic Type — EEPLD
Logic Density — 500 gates
Speed Grade — 7 ns
Reported Propagation Delay — 7.5 ns
Package Body Size — 11.51 mm x 11.51 mm
Power-Down Control — Optional pin-controlled power-down; PLCC pin 5
Supported Fusemap — JEDEC 22V10 fusemap compatible
Family Maximum Speed — Down to 5 ns
Family Typical Power Dissipation — As low as 100 uA
REACH Status — [DATA_NEEDED: REACH status]
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]

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