CS5566-ISZR - 24-bit 5kSps Sigma-Delta ADC | Cirrus Logic
MPN: CS5566-ISZR ✓ Hoạt độngCS5566-ISZR Tóm tắt
An ADC (analog-to-digital converter) is a data-acquisition component that translates continuous analog signals into discrete digital codes for processing by microcontrollers, FPGAs, or DSPs. Sigma-delta ADCs use oversampling and noise-shaping to achieve very high effective resolution at low-to-moderate sample rates, and they sit within the hierarchy: ADC -> data converter -> data acquisition IC -> signal chain -> mixed-signal semiconductor. The CS5566 specifically targets industrial measurement, weighing-scale, and transducer read-out applications where 24-bit effective resolution and a fully differential front-end are required.
Key features include 24-bit no-missing-codes performance, 5 kSps maximum throughput, a fully differential input, on-chip input and reference buffers, and signal-to-noise of 84 dB. The CS5566 operates from 2.5 V or 5 V analog supplies, accepts 0 V to 5 V common-mode input range, and offers 0.0005% linearity error. Conversion time is 200 us per conversion, and the device settles in a single conversion cycle, simplifying calibration and reducing system latency.
The converter architecture combines a sigma-delta modulator with a digital decimation filter. Internal calibration registers compensate for offset and gain drift, while the differential reference path rejects common-mode supply noise. The serial interface supports either a three-wire mode (DIN, DOUT, SCLK shared) or a four-wire mode (independent SDOUT and SDIN), and a synchronous DRDY flag indicates when a new conversion result is available in the output register.
Typical applications include industrial weighing scales, strain-gauge bridge readouts, pressure transducers, temperature measurement (RTD/thermocouple front-ends), process-control instrumentation, and precision sensor signal conditioning. The differential input and high-impedance reference buffer allow direct connection to bridge sensors without additional instrumentation amplifiers, reducing BOM cost and PCB area.
When designing with the CS5566-ISZR, place 0.1 uF decoupling capacitors close to AVDD and DVDD pins and keep the analog and digital ground returns joined at a single star point. The differential analog inputs must remain within the specified common-mode range; use the on-chip buffers when source impedance exceeds 1 kohm. This page synthesizes distributor stock data, drop-in alternatives, and practical design notes not consolidated in the manufacturer datasheet.
Bộ thay thế dễ dàng lắp đặt cho CS5566-ISZR — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với CS5566-ISZR (cùng hình factor và footprint) — khác nhau ở Analog Supply Voltage, Digital Supply Voltage, Input Type, Package, Resolution.
CS5566-ISZ
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
CS5566-IS
✅ Drop-In ⚠️ Thông số chưa được xác minh📋 Tham chiếu thay thế (không có trong danh mục)
CS5566-BSZ
✅ Drop-In ⚠️ Thông số chưa được xác minh📋 Tham chiếu thay thế (không có trong danh mục)
CS5566-BSZR
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
CS5566-ISZR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →CS5566-ISZR Tỷ lệ tối đa & tính chất điện
| Độ phân giải | 24 bits |
| Number of Channels | 1 |
| Conversion Rate (max) | 5 kSps |
| Conversion Time | 200 us |
| ADC Architecture | Sigma-Delta |
| Input Type | Fully differential |
| Number of Inputs | 1 |
| Signal-to-Noise Ratio | 84 dB |
| Linearity Error | 0.0005% |
| No Missing Codes | 24 bits guaranteed |
| Analog Supply Voltage | 2.5 V or 5 V |
| Digital Supply Voltage | 2.5 V or 5 V |
| Common-Mode Input Range | 0 V to 5 V |
| Input Impedance | High (on-chip buffer) |
| Reference Input | External differential, buffered |
| Serial Interface | 3-/4-wire SPI-compatible |
| Settling Time | Single conversion |
| Nhiệt độ hoạt động | -40 C to +85 C |
| Hộp | 24-pin SSOP |
| Kiểu lắp đặt | Surface Mount |
| Packaging | Tape & Reel (2000/reel) |
| Trạng thái RoHS | Compliant |
Cấu hình chân CS5566-ISZR
| Chân 1 | AIN+ — Differential analog positive input |
| Chân 2 | AIN- — Differential analog negative input |
| Chân 3 | VREF+ — Differential reference positive (buffered) |
| Chân 4 | VREF- — Differential reference negative |
| Chân 5 | AGND — Analog ground |
| Chân 6 | AVDD — Analog supply (2.5 V or 5 V) |
| Chân 7 | NC — Not connected (per datasheet) |
| Chân 8 | NC — Not connected (per datasheet) |
| Chân 9 | DGND — Digital ground |
| Chân 10 | DVDD — Digital supply (2.5 V or 5 V) |
| Chân 11 | SCLK — Serial clock input |
| Chân 12 | SDIN — Serial data input |
| Chân 13 | SDOUT — Serial data output |
| Chân 14 | DRDY — Data ready output (active low) |
| Chân 15 | NC — Not connected (per datasheet) |
| Chân 16 | NC — Not connected (per datasheet) |
| Chân 17 | NC — Not connected (per datasheet) |
| Chân 18 | NC — Not connected (per datasheet) |
| Chân 19 | NC — Not connected (per datasheet) |
| Chân 20 | NC — Not connected (per datasheet) |
| Chân 21 | NC — Not connected (per datasheet) |
| Chân 22 | NC — Not connected (per datasheet) |
| Chân 23 | NC — Not connected (per datasheet) |
| Chân 24 | NC — Not connected (per datasheet) |
Ứng dụng tiêu biểu
CS5566-ISZR phù hợp cho 6 Áp dụngs: Industrial Weighing Scales, Strain-Gauge Bridge Readout, RTD Temperature Measurement Front-End, Process-Control Instrumentation, Precision Sensor Signal Conditioning, Weighing-Scale Calibration Reference.
Industrial Weighing Scales
The CS5566-ISZR's 24-bit no-missing-codes resolution and 0.0005% linearity error make it a strong fit for industrial weighing scales where load-cell signals must be resolved to fractions of a gram across a wide dynamic range. The fully differential input accepts the bridge output of a strain-gauge load cell, and the on-chip input buffers allow direct connection without external instrumentation amplifiers. Operated at the maximum 5 kSps rate, the device settles in a single conversion, simplifying calibration loops. The 84 dB SNR is sufficient to resolve sub-milligram weight changes from a 10 kg cell, and the 0 V to 5 V common-mode range covers typical bridge excitation voltages.
Được đề xuất
Strain-Gauge Bridge Readout
Bridge-transducer signal conditioning benefits directly from the CS5566-ISZR's differential input path and on-chip reference buffers. The buffered VREF+ input allows the excitation voltage to drive the bridge while being sensed by the ADC, eliminating reference-current errors that plague unbuffered sigma-delta converters. With 24 effective bits at 5 kSps and 0.0005% linearity, the device resolves microstrain levels in foil and semiconductor gauges used in structural-health and pressure monitoring. The 24-pin SSOP package and 2.5 V/5 V dual supply flexibility ease integration into compact transducer modules.
Được đề xuất
RTD Temperature Measurement Front-End
The CS5566-ISZR resolves sub-milliohm resistance changes in PT100 and PT1000 RTDs with its 24-bit resolution and differential input stage, supporting accurate temperature readings from -200 C to +850 C. Operated at 5 kSps from a 5 V analog supply, the device provides the dynamic range needed to digitize the small RTD signal even when using a low excitation current to limit self-heating. The on-chip buffers tolerate the high source impedance of remotely located RTDs, while the SPI-compatible serial interface simplifies four-wire RTD wiring schemes and allows direct connection to a microcontroller for linearization.
Được đề xuất
Process-Control Instrumentation
Process-control loops requiring high-accuracy analog monitoring can use the CS5566-ISZR to digitize 0-10 V or 4-20 mA transducer outputs at up to 5 kSps. The differential input rejects common-mode noise from long cable runs in factory environments, while the 24-bit resolution preserves measurement precision at the lowest signal levels. Settling in a single conversion simplifies digital filtering and improves loop response time compared to multiplexed ADCs that require channel-switching settle delays. Industrial temperature range -40 C to +85 C supports deployment in cabinets and panel-mount instruments.
Được đề xuất
Precision Sensor Signal Conditioning
The CS5566-ISZR is well-suited as a precision front-end for sensors with low-level differential outputs, such as pressure transducers, load cells, and torque sensors. The on-chip buffers eliminate the need for external instrumentation amplifiers, reducing BOM count and PCB area, while the 84 dB SNR preserves signal integrity for downstream digital filtering. Operating at 5 kSps from 2.5 V or 5 V analog supplies, the converter supports portable and line-powered sensor modules. The 24-pin SSOP package fits inside sealed transducer housings alongside the sensor die.
Được đề xuất
Weighing-Scale Calibration Reference
Reference designs for calibrating industrial weighing scales use the CS5566-ISZR as the primary 24-bit ADC, leveraging its 0.0005% linearity error and 5 kSps rate to support fast tare reset and span-calibration routines. The differential input stage accepts the load-cell bridge output directly, while the 3-/4-wire SPI interface allows the host microcontroller to read conversion results without external logic. Combined with the CS5566-ISZ tube variant for prototype builds and the CS5566-ISZR tape-and-reel variant for high-volume manufacturing, the CS5566 family offers a single PCB layout usable across the product lifecycle.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho CS5566-ISZR — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | CS5566-ISZ | CS5566-IS | CS5566-BSZ | CS5566-BSZR |
|---|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Package | 24-pin SSOP | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same |
| Resolution | 24 bits | 24 bits | 24 bits | 24 bits | 24 bits |
| Conversion Rate | 5 kSps | 5 kSps | 5 kSps | 5 kSps | 5 kSps |
| Input Type | Fully differential | Fully differential | Fully differential | Fully differential | Fully differential |
| Supply Voltage | 2.5 V or 5 V | 2.5 V or 5 V | 2.5 V or 5 V | 2.5 V or 5 V | 2.5 V or 5 V |
| Packaging Form | Tape & Reel | Tube | Tube | Tube | Tape & Reel |
| Lead-Free / RoHS | Lead-free | Lead-free (commercial) | Standard | Lead-free (RoHS) | Lead-free (RoHS) |
Bảo phân biệt quan trọng
- On-chip input and reference buffers eliminate external amplifiers (vsADS1231)
- Higher throughput than fixed-rate competitors (vsADS1231)
- Pin-compatible with multiple Cirrus Logic CS5566 package variants (vsCS5566-ISZ (tube))
- Lead-free RoHS-compliant option available in same footprint (vsCS5566-IS)
Ghi chú thiết kế
Decouple AVDD and DVDD close to the package pins with 0.1 uF ceramic capacitors in parallel with 10 uF tantalum or polymer capacitors. The CS5566-ISZR operates from 2.5 V or 5 V; use low-dropout regulators with PSRR above 60 dB at 1 kHz to avoid coupling supply ripple into the converter result. Separate analog and digital ground planes should be joined at a single point beneath the IC to prevent digital return currents from contaminating the analog reference path. A bulk 47 uF capacitor on the analog supply rail provides the inrush reserve needed when the converter enters its calibration cycle.
Route the differential AIN+/AIN- and VREF+/VREF- pairs as matched-length, parallel-trace pairs with ground shielding on both sides and below. Keep digital lines (SCLK, SDIN, SDOUT, DRDY) routed away from the analog input traces to minimize digital-to-analog crosstalk. Place the CS5566-ISZR away from switching power inductors and high-current traces to reduce common-mode noise pickup. The exposed lead-frame of the SSOP-24 footprint should be soldered to a copper pour tied to analog ground for thermal dissipation and reference-plane stability.
The on-chip input buffers tolerate source impedances up to several kilohms, but excessive source impedance degrades THD and settling time. For 5 kSps operation, total source impedance including cable resistance should remain below 5 kohm. When interfacing to a Wheatstone bridge, drive the bridge excitation from a low-noise reference such as the REF02 or ADR01 rather than the digital supply, and place a 0.1 uF capacitor directly at VREF+ pin to filter reference-loop noise. DRDY should be monitored by an interrupt-capable GPIO on the host microcontroller to avoid polling overhead.
Common design mistakes include failing to issue the calibration command after power-up (the CS5566-ISZR requires a self-calibration routine to meet its 0.0005% linearity spec), driving the analog input beyond the 0 V to 5 V common-mode range, and neglecting the DRDY-to-read timing relationship (DRDY falling edge indicates a fresh conversion in the output register). When migrating to the CS5566-ISZ tube variant, verify the tube orientation matches pick-and-place tooling requirements to avoid production-line delays. Estimated: input-referred noise at 5 kSps is approximately 1.2 uVrms based on 84 dB SNR over 2.5 kHz Nyquist bandwidth.
Thông tin tuân thủ
RoHS-compliant per Cirrus Logic product page. Lead-free construction available in -BSZ/-BSZR variants. Not AEC-Q100 qualified; not automotive-grade.