CS5566-ISZR - 24-bit 5kSps Sigma-Delta ADC | Cirrus Logic
N.º da peça: CS5566-ISZR ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $8.45 | $8,45 |
| 10 | $7.62 | $76,20 |
| 100 | $6.74 | $674,00 |
| 500 | $5.95 | $2.975,00 |
| 1.000 | $5.31 | $5.310,00 |
CS5566-ISZR Visão geral
An ADC (analog-to-digital converter) is a data-acquisition component that translates continuous analog signals into discrete digital codes for processing by microcontrollers, FPGAs, or DSPs. Sigma-delta ADCs use oversampling and noise-shaping to achieve very high effective resolution at low-to-moderate sample rates, and they sit within the hierarchy: ADC -> data converter -> data acquisition IC -> signal chain -> mixed-signal semiconductor. The CS5566 specifically targets industrial measurement, weighing-scale, and transducer read-out applications where 24-bit effective resolution and a fully differential front-end are required.
Key features include 24-bit no-missing-codes performance, 5 kSps maximum throughput, a fully differential input, on-chip input and reference buffers, and signal-to-noise of 84 dB. The CS5566 operates from 2.5 V or 5 V analog supplies, accepts 0 V to 5 V common-mode input range, and offers 0.0005% linearity error. Conversion time is 200 us per conversion, and the device settles in a single conversion cycle, simplifying calibration and reducing system latency.
The converter architecture combines a sigma-delta modulator with a digital decimation filter. Internal calibration registers compensate for offset and gain drift, while the differential reference path rejects common-mode supply noise. The serial interface supports either a three-wire mode (DIN, DOUT, SCLK shared) or a four-wire mode (independent SDOUT and SDIN), and a synchronous DRDY flag indicates when a new conversion result is available in the output register.
Typical applications include industrial weighing scales, strain-gauge bridge readouts, pressure transducers, temperature measurement (RTD/thermocouple front-ends), process-control instrumentation, and precision sensor signal conditioning. The differential input and high-impedance reference buffer allow direct connection to bridge sensors without additional instrumentation amplifiers, reducing BOM cost and PCB area.
When designing with the CS5566-ISZR, place 0.1 uF decoupling capacitors close to AVDD and DVDD pins and keep the analog and digital ground returns joined at a single star point. The differential analog inputs must remain within the specified common-mode range; use the on-chip buffers when source impedance exceeds 1 kohm. This page synthesizes distributor stock data, drop-in alternatives, and practical design notes not consolidated in the manufacturer datasheet.
Alternativas drop-in para CS5566-ISZR — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com CS5566-ISZR (mesmo formato e footprint) — diferindo em Analog Supply Voltage, Digital Supply Voltage, Input Type, Package, Resolution.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
CS5566-ISZ
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
CS5566-IS
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
CS5566-BSZ
✅ Drop-In ⚠️ Especificações não verificadas📋 Alternativa de referência (fora do catálogo)
CS5566-BSZR
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
CS5566-ISZR
✅ Drop-In✓ Em estoque
$5.31 / unidade
Ver ficha técnica →CS5566-ISZR Classificações máximas e características elétricas
| Resolução | 24 bits |
| Number of Channels | 1 |
| Conversion Rate (max) | 5 kSps |
| Conversion Time | 200 us |
| ADC Architecture | Sigma-Delta |
| Input Type | Fully differential |
| Number of Inputs | 1 |
| Signal-to-Noise Ratio | 84 dB |
| Linearity Error | 0.0005% |
| No Missing Codes | 24 bits guaranteed |
| Analog Supply Voltage | 2.5 V or 5 V |
| Digital Supply Voltage | 2.5 V or 5 V |
| Common-Mode Input Range | 0 V to 5 V |
| Input Impedance | High (on-chip buffer) |
| Reference Input | External differential, buffered |
| Serial Interface | 3-/4-wire SPI-compatible |
| Settling Time | Single conversion |
| Temperatura de operação | -40 C to +85 C |
| Encapsulamento | 24-pin SSOP |
| Tipo de montagem | Surface Mount |
| Packaging | Tape & Reel (2000/reel) |
| Status RoHS | Compliant |
Configuração de pinos do CS5566-ISZR
| Pino 1 | AIN+ — Differential analog positive input |
| Pino 2 | AIN- — Differential analog negative input |
| Pino 3 | VREF+ — Differential reference positive (buffered) |
| Pino 4 | VREF- — Differential reference negative |
| Pino 5 | AGND — Analog ground |
| Pino 6 | AVDD — Analog supply (2.5 V or 5 V) |
| Pino 7 | NC — Not connected (per datasheet) |
| Pino 8 | NC — Not connected (per datasheet) |
| Pino 9 | DGND — Digital ground |
| Pino 10 | DVDD — Digital supply (2.5 V or 5 V) |
| Pino 11 | SCLK — Serial clock input |
| Pino 12 | SDIN — Serial data input |
| Pino 13 | SDOUT — Serial data output |
| Pino 14 | DRDY — Data ready output (active low) |
| Pino 15 | NC — Not connected (per datasheet) |
| Pino 16 | NC — Not connected (per datasheet) |
| Pino 17 | NC — Not connected (per datasheet) |
| Pino 18 | NC — Not connected (per datasheet) |
| Pino 19 | NC — Not connected (per datasheet) |
| Pino 20 | NC — Not connected (per datasheet) |
| Pino 21 | NC — Not connected (per datasheet) |
| Pino 22 | NC — Not connected (per datasheet) |
| Pino 23 | NC — Not connected (per datasheet) |
| Pino 24 | NC — Not connected (per datasheet) |
Aplicações típicas
CS5566-ISZR é adequado para 6 aplicaçãos: Industrial Weighing Scales, Strain-Gauge Bridge Readout, RTD Temperature Measurement Front-End, Process-Control Instrumentation, Precision Sensor Signal Conditioning, Weighing-Scale Calibration Reference.
Industrial Weighing Scales
The CS5566-ISZR's 24-bit no-missing-codes resolution and 0.0005% linearity error make it a strong fit for industrial weighing scales where load-cell signals must be resolved to fractions of a gram across a wide dynamic range. The fully differential input accepts the bridge output of a strain-gauge load cell, and the on-chip input buffers allow direct connection without external instrumentation amplifiers. Operated at the maximum 5 kSps rate, the device settles in a single conversion, simplifying calibration loops. The 84 dB SNR is sufficient to resolve sub-milligram weight changes from a 10 kg cell, and the 0 V to 5 V common-mode range covers typical bridge excitation voltages.
Recomendado
Strain-Gauge Bridge Readout
Bridge-transducer signal conditioning benefits directly from the CS5566-ISZR's differential input path and on-chip reference buffers. The buffered VREF+ input allows the excitation voltage to drive the bridge while being sensed by the ADC, eliminating reference-current errors that plague unbuffered sigma-delta converters. With 24 effective bits at 5 kSps and 0.0005% linearity, the device resolves microstrain levels in foil and semiconductor gauges used in structural-health and pressure monitoring. The 24-pin SSOP package and 2.5 V/5 V dual supply flexibility ease integration into compact transducer modules.
Recomendado
RTD Temperature Measurement Front-End
The CS5566-ISZR resolves sub-milliohm resistance changes in PT100 and PT1000 RTDs with its 24-bit resolution and differential input stage, supporting accurate temperature readings from -200 C to +850 C. Operated at 5 kSps from a 5 V analog supply, the device provides the dynamic range needed to digitize the small RTD signal even when using a low excitation current to limit self-heating. The on-chip buffers tolerate the high source impedance of remotely located RTDs, while the SPI-compatible serial interface simplifies four-wire RTD wiring schemes and allows direct connection to a microcontroller for linearization.
Recomendado
Process-Control Instrumentation
Process-control loops requiring high-accuracy analog monitoring can use the CS5566-ISZR to digitize 0-10 V or 4-20 mA transducer outputs at up to 5 kSps. The differential input rejects common-mode noise from long cable runs in factory environments, while the 24-bit resolution preserves measurement precision at the lowest signal levels. Settling in a single conversion simplifies digital filtering and improves loop response time compared to multiplexed ADCs that require channel-switching settle delays. Industrial temperature range -40 C to +85 C supports deployment in cabinets and panel-mount instruments.
Recomendado
Precision Sensor Signal Conditioning
The CS5566-ISZR is well-suited as a precision front-end for sensors with low-level differential outputs, such as pressure transducers, load cells, and torque sensors. The on-chip buffers eliminate the need for external instrumentation amplifiers, reducing BOM count and PCB area, while the 84 dB SNR preserves signal integrity for downstream digital filtering. Operating at 5 kSps from 2.5 V or 5 V analog supplies, the converter supports portable and line-powered sensor modules. The 24-pin SSOP package fits inside sealed transducer housings alongside the sensor die.
Recomendado
Weighing-Scale Calibration Reference
Reference designs for calibrating industrial weighing scales use the CS5566-ISZR as the primary 24-bit ADC, leveraging its 0.0005% linearity error and 5 kSps rate to support fast tare reset and span-calibration routines. The differential input stage accepts the load-cell bridge output directly, while the 3-/4-wire SPI interface allows the host microcontroller to read conversion results without external logic. Combined with the CS5566-ISZ tube variant for prototype builds and the CS5566-ISZR tape-and-reel variant for high-volume manufacturing, the CS5566 family offers a single PCB layout usable across the product lifecycle.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para CS5566-ISZR — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | CS5566-ISZ | CS5566-IS | CS5566-BSZ | CS5566-BSZR |
|---|---|---|---|---|---|
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Package | 24-pin SSOP | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same | 24-pin SSOP - same |
| Resolution | 24 bits | 24 bits | 24 bits | 24 bits | 24 bits |
| Conversion Rate | 5 kSps | 5 kSps | 5 kSps | 5 kSps | 5 kSps |
| Input Type | Fully differential | Fully differential | Fully differential | Fully differential | Fully differential |
| Supply Voltage | 2.5 V or 5 V | 2.5 V or 5 V | 2.5 V or 5 V | 2.5 V or 5 V | 2.5 V or 5 V |
| Packaging Form | Tape & Reel | Tube | Tube | Tube | Tape & Reel |
| Lead-Free / RoHS | Lead-free | Lead-free (commercial) | Standard | Lead-free (RoHS) | Lead-free (RoHS) |
Principais diferenciais
- On-chip input and reference buffers eliminate external amplifiers (vs ADS1231)
- Higher throughput than fixed-rate competitors (vs ADS1231)
- Pin-compatible with multiple Cirrus Logic CS5566 package variants (vs CS5566-ISZ (tube))
- Lead-free RoHS-compliant option available in same footprint (vs CS5566-IS)
Notas de projeto
Decouple AVDD and DVDD close to the package pins with 0.1 uF ceramic capacitors in parallel with 10 uF tantalum or polymer capacitors. The CS5566-ISZR operates from 2.5 V or 5 V; use low-dropout regulators with PSRR above 60 dB at 1 kHz to avoid coupling supply ripple into the converter result. Separate analog and digital ground planes should be joined at a single point beneath the IC to prevent digital return currents from contaminating the analog reference path. A bulk 47 uF capacitor on the analog supply rail provides the inrush reserve needed when the converter enters its calibration cycle.
Route the differential AIN+/AIN- and VREF+/VREF- pairs as matched-length, parallel-trace pairs with ground shielding on both sides and below. Keep digital lines (SCLK, SDIN, SDOUT, DRDY) routed away from the analog input traces to minimize digital-to-analog crosstalk. Place the CS5566-ISZR away from switching power inductors and high-current traces to reduce common-mode noise pickup. The exposed lead-frame of the SSOP-24 footprint should be soldered to a copper pour tied to analog ground for thermal dissipation and reference-plane stability.
The on-chip input buffers tolerate source impedances up to several kilohms, but excessive source impedance degrades THD and settling time. For 5 kSps operation, total source impedance including cable resistance should remain below 5 kohm. When interfacing to a Wheatstone bridge, drive the bridge excitation from a low-noise reference such as the REF02 or ADR01 rather than the digital supply, and place a 0.1 uF capacitor directly at VREF+ pin to filter reference-loop noise. DRDY should be monitored by an interrupt-capable GPIO on the host microcontroller to avoid polling overhead.
Common design mistakes include failing to issue the calibration command after power-up (the CS5566-ISZR requires a self-calibration routine to meet its 0.0005% linearity spec), driving the analog input beyond the 0 V to 5 V common-mode range, and neglecting the DRDY-to-read timing relationship (DRDY falling edge indicates a fresh conversion in the output register). When migrating to the CS5566-ISZ tube variant, verify the tube orientation matches pick-and-place tooling requirements to avoid production-line delays. Estimated: input-referred noise at 5 kSps is approximately 1.2 uVrms based on 84 dB SNR over 2.5 kHz Nyquist bandwidth.
Informações de conformidade
RoHS-compliant per Cirrus Logic product page. Lead-free construction available in -BSZ/-BSZR variants. Not AEC-Q100 qualified; not automotive-grade.