DS90LV028AHM - 3V LVDS Dual Differential Line Receiver | Texas Instruments
MPN: DS90LV028AHM ✓ Hoạt độngDS90LV028AHM Tóm tắt
An LVDS receiver is a type of line receiver that converts a small-amplitude differential pair into a single-ended digital output. Differential signaling belongs to the broader hierarchy of interface ICs, because common-mode rejection, equalization and low swing allow reliable transfer over longer cables or PCB traces where single-ended signals would be corrupted by noise. The DS90LV028AH is the receiving half of a point-to-point link; the matching line driver is the DS90LV027A family.
Key characteristics of the DS90LV028AHM include support for 400 Mbps (200 MHz) data rates, a 3.3 V supply rail, a flow-through pin arrangement that simplifies point-to-point PCB routing, and a high-temperature grade rated from -40 C to +85 C for industrial and automotive-adjacent environments. The dual-channel architecture lets one package carry two independent LVDS links, reducing board area in multi-channel point-to-point systems.
Internally the receiver uses CMOS logic with differential input stages, giving low power dissipation compared with PECL or ECL receivers while retaining low noise. Because LVDS receivers present a high-impedance differential input, the part draws minimal DC current from the driver, which increases the achievable link distance and reduces connector and cable loading. The flow-through layout places input pins opposite output pins so the device can sit in-line on a board edge or cable-riser interface.
Typical applications include backplane and board-to-board point-to-point links, industrial and telecom backplanes, video and imaging data paths, and instrumentation or test equipment that needs high-rate transfer over a few metres of twisted pair. It is also used where a high-power PECL/ECL receiver would waste power, since the LVDS approach delivers the same throughput at a fraction of the power.
When designing with this receiver, keep differential trace pairs tightly coupled with matched length and controlled impedance, and provide solid ground-plane return under the pair. The 3.3 V supply should be decoupled close to the VCC pin. Because the part is a high-temperature grade variant, verify your system ambient and the associated operating limits against the datasheet before using it in elevated-temperature locations.
This page brings together the manufacturer specifications, drop-in ordering-code options for the same die, and practical layout and signal-integrity guidance that engineers normally have to piece together from several separate documents.
Bộ thay thế dễ dàng lắp đặt cho DS90LV028AHM — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với DS90LV028AHM (cùng hình factor và footprint) — khác nhau ở Device Type, Signaling Standard.
DS90LV028ATM
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DS90LV028AHM/NOPB
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
DS90LV028ATM
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DS90LV028ATMX
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
DS90LV028AHM Thông số kỹ thuật
| Device Type | Dual differential line receiver (LVDS) |
| Technology | CMOS |
| Điện áp cung cấp | 3.3 V (3-V LVDS) |
| Maximum Data Rate | In excess of 400 Mbps (200 MHz) |
| Differential Input Signal | 350 mV typical |
| Number of Channels | 2 |
| Number of Receivers per Package | 2 |
| Package Type | 8-SOIC (SOIC-8, gull wing) |
| Nhiệt độ hoạt động | -40 C to +85 C |
| Temperature Grade | High temperature |
| Kiểu lắp đặt | Surface mount |
| Terminal Count | 8 |
| Logic Levels | CMOS/TTL-compatible output |
| Signaling Standard | LVDS (Low Voltage Differential Signaling) |
| PCB Layout Style | Flow-through design |
| Companion Driver | DS90LV027A LVDS line driver |
| Trạng thái RoHS | Compliant |
Cấu hình chân DS90LV028AHM
| Chân 1 | 1OUT — Channel 1 CMOS/TTL output |
| Chân 2 | 1IN- — Channel 1 differential input negative |
| Chân 3 | 1IN+ — Channel 1 differential input positive |
| Chân 4 | GND — Ground |
| Chân 5 | 2IN+ — Channel 2 differential input positive |
| Chân 6 | 2IN- — Channel 2 differential input negative |
| Chân 7 | 2OUT — Channel 2 CMOS/TTL output |
| Chân 8 | VCC — 3.3 V supply input |
Ứng dụng tiêu biểu
DS90LV028AHM phù hợp cho 6 Áp dụngs: Board-to-Board Point-to-Point LVDS Links, Industrial Backplane and Telecom Rack Interconnects, Video and Imaging Data Paths, Test and Measurement Instrumentation, Automotive and Heavy Equipment Cabling, Clock and Data Recovery in Communications Modules.
Board-to-Board Point-to-Point LVDS Links
The DS90LV028AHM is used as the receiving end of high-speed point-to-point links between two circuit boards, where the 400 Mbps (200 MHz) capability gives ample margin over most inter-board data paths. Its flow-through pin arrangement lets the differential pair enter one edge of the package and the CMOS outputs leave the opposite edge, which keeps the stub lengths short and makes routing between mezzanine connectors simple. Two independent channels fit in one 8-SOIC, so a system needing four links can be served by two packages instead of four single-channel receivers. The low 350 mV typical differential swing keeps power dissipation far below that of a PECL receiver while still rejecting common-mode noise picked up on long traces.
Được đề xuất
Industrial Backplane and Telecom Rack Interconnects
Backplane and rack-level systems in telecom and industrial control equipment use the DS90LV028AHM to recover clock and data signals transmitted as LVDS across a multi-slot chassis. The -40 C to +85 C grade of the AH ordering code suits equipment rooms and outdoor cabinets where the standard-temperature variants can be marginal. Because LVDS is a low-swing differential standard, the receiver tolerates common-mode noise generated by adjacent switching regulators and fan motors better than single-ended receivers. Two channels per package also reduce the connector pin count and PCB area compared with discrete single-channel parts, which matters when the backplane already carries hundreds of nets.
Được đề xuất
Video and Imaging Data Paths
Imaging systems, video routers and frame grabbers that need to move parallelized pixel data across a cable or between boards commonly use LVDS pairs terminated at a DS90LV028AHM. The receiver's support for rates in excess of 400 Mbps is ample for 10-bit-per-channel parallel data carried over a handful of differential pairs. Because the receiver outputs standard CMOS/TTL levels, the recovered data can feed directly into an FPGA or image sensor readout register without additional level translation. The low-noise CMOS input stage avoids adding significant jitter or crosstalk to the recovered signal, and the flow-through layout keeps the video data channel physically isolated from clock channels.
Được đề xuất
Test and Measurement Instrumentation
Instrumentation such as oscilloscope trigger paths, arbitrary waveform generator interconnects and automated test equipment needs a receiver that recovers signals without adding noise to the measurement. The DS90LV028AHM provides low-noise differential recovery with a small 350 mV typical input swing, which helps preserve the integrity of small-amplitude trigger and sync signals. Its low power dissipation keeps the thermal contribution to the instrument's own noise budget negligible, and the 8-SOIC footprint is easy to accommodate in dense front-end analogue compartments where space is limited. Using the DS90LV027A driver family on the source side keeps the link swing and termination scheme consistent with the manufacturer's reference design.
Được đề xuất
Automotive and Heavy Equipment Cabling
In vehicle and heavy-equipment platforms, sensor and controller nodes are often linked with LVDS over shielded twisted pair inside a harsh environment with vibration and wide temperature swings. The high-temperature grade of the DS90LV028AHM, rated from -40 C to +85 C, covers the majority of cabin and compartment electronics positions, while the differential nature of the interface rejects the ground offsets and noise common in vehicle harnesses. Two receive channels per package limit the number of connectors needed per node. Engineers should still confirm the exact temperature qualification requirement of the end application against the datasheet limits before releasing the design for production.
Được đề xuất
Clock and Data Recovery in Communications Modules
RF and microwave front-end modules in communications equipment frequently need a parallel data and clock return path from a remote module back to the baseband processor, and the DS90LV028AHM fits that role as a dual-channel receiver. Handling both clock and data in one package reduces skew risk because the channels share the same supply and die, and both exceed 400 Mbps so even double-rate source-synchronous interfaces are supported. Low power dissipation matters in battery-backed and outdoor units where every milliamp translates directly into operating time. Because the recovered outputs are CMOS/TTL compatible, they can drive an FPGA input buffer or a microcontroller port with minimal interfacing logic.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho DS90LV028AHM — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | DS90LV028A | DS90LV028AHM/NOPB | DS90LV028ATM | DS90LV028ATMX |
|---|---|---|---|---|---|
| Package | SOIC-8 (8-SOIC) | SOIC-8 (8-SOIC) - same | SOIC-8 (8-SOIC) - same | SOIC-8 (8-SOIC) - same | SOIC-8 (8-SOIC) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Device Type | Dual LVDS differential line receiver | Dual LVDS differential line receiver | Dual LVDS differential line receiver | Dual LVDS differential line receiver | Dual LVDS differential line receiver |
| Maximum Data Rate | In excess of 400 Mbps (200 MHz) | In excess of 400 Mbps (200 MHz) | In excess of 400 Mbps (200 MHz) | In excess of 400 Mbps (200 MHz) | In excess of 400 Mbps (200 MHz) |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| Differential Input Signal | 350 mV typical | 350 mV typical | 350 mV typical | 350 mV typical | 350 mV typical |
| Number of Receive Channels | 2 | 2 | 2 | 2 | 2 |
| Technology | CMOS | CMOS | CMOS | CMOS | CMOS |
| PCB Layout Style | Flow-through design | Flow-through design | Flow-through design | Flow-through design | Flow-through design |
| Termination / Pin Functions | 1IN+/1IN-, 2IN+/2IN-, 1OUT, 2OUT, VCC, GND | 1IN+/1IN-, 2IN+/2IN-, 1OUT, 2OUT, VCC, GND | 1IN+/1IN-, 2IN+/2IN-, 1OUT, 2OUT, VCC, GND | 1IN+/1IN-, 2IN+/2IN-, 1OUT, 2OUT, VCC, GND | 1IN+/1IN-, 2IN+/2IN-, 1OUT, 2OUT, VCC, GND |
| RoHS Compliance | Compliant | Compliant | Compliant | Compliant | Compliant |
Bảo phân biệt quan trọng
- Extended high-temperature grade in the same 8-SOIC footprint (vsDS90LV028ATM)
- Two independent LVDS receive channels per package (vsDS90LV001TMX)
- Low-power CMOS LVDS input stage instead of PECL/ECL (vsDS90LV047ATM)
- Flow-through pin organisation for point-to-point routing (vsDS90LV028A)
Ghi chú thiết kế
Route each differential pair as a tightly coupled, length-matched pair over a continuous ground plane, and keep the two receive channels physically apart to limit crosstalk. The LVDS input is only 350 mV typical, so any discontinuity in the pair (via stubs, unmatched length, or a split across a plane change) directly degrades the recovered eye. Where the pair crosses a split in the ground plane, add a stitching capacitor near the receiver. Use the termination scheme shown in the datasheet typical application diagram rather than adding extra bulk capacitance at the input pins.
Exploit the flow-through pin arrangement: place the device so the differential inputs terminate at one board edge and the CMOS outputs leave at the opposite edge, in line with the cable or connector. This keeps the LVDS stub extremely short, which is the single most effective way to reduce reflections at 200 MHz. Place the device close to the connector or transceiver it pairs with, and keep the 3.3 V bypass capacitor at the VCC pin with a short, low-inductance ground return to the ground pin.
Do not substitute a multi-channel or enable-pin-equipped LVDS receiver into this footprint without checking the pin configuration table. Quad-channel parts such as the DS90LV047A family use a 16-pin package, and parts with enable or fail-safe pins reassign several SOIC-8 positions, so an assumed drop-in will silently mis-route the differential pair. Also confirm the temperature grade you order: the standard-temperature ordering codes of this family are not rated to the same +85 C upper limit as the AH high-temperature code.
Thông tin tuân thủ
RoHS and REACH compliance are shown for the DS90LV028AH family in component cross-reference listings. The AH grade is an extended industrial temperature part and is not marketed as an AEC-Q100 qualified automotive device.
