DSPIC33FJ128MC710A-I/PT - 40 MIPS 128KB Flash Motor Control DSC | Microchip
MPN: DSPIC33FJ128MC710A-I/PT ✓ Hoạt độngDSPIC33FJ128MC710A-I/PT Tóm tắt
A Digital Signal Controller (DSC) is a hybrid device that fuses a microcontroller's deterministic control peripherals with a Digital Signal Processor (DSP) engine for high-throughput mathematical operations. In the broader taxonomy, the dsPIC33FJ128MC710A sits within: DSC -> microcontroller -> embedded processor -> semiconductor. The dsPIC33F family specifically targets closed-loop control loops such as field-oriented control (FOC) of three-phase motors, where single-cycle MAC operations accelerate Park/Clarke transforms.
Key differentiating features of the DSPIC33FJ128MC710A include six 16-bit Motor-Control PWM outputs with up to 8 complementary pairs and 7.5 ns dead-time resolution, a 12-bit ADC with up to 32 channels and 1 Msps throughput supporting simultaneous sampling for current sensing, an integrated CAN 2.0B module for industrial networking, and the dsPIC33F DSP engine executing MAC operations in a single instruction cycle. The 100-pin TQFP-100 (12x12) package exposes the full peripheral set, including five UART/SPI/I2C configurable serial interfaces and parallel PMP.
The DSPIC33FJ128MC710A is engineered around a Harvard-architecture CPU with a 16-bit datapath, hardware multiply-accumulate, and zero-overhead looping. A built-in trace port, JTAG, and ICSP support real-time debug through MPLAB tools, while the dual-partition Flash block supports live firmware updates. Compared with a generic 16-bit MCU, the dsPIC33FJ128MC710A delivers deterministic DSP throughput at 40 MIPS which simplifies compensation-loop math in motor and power-conversion firmware.
Typical applications include brushless DC (BLDC) motor drives, single- and three-phase induction motor control, switched reluctance motor (SRM) drives, sensorless FOC, solar inverters, automotive accessory drives, and CAN-connected industrial automation nodes. The combination of motor-control PWM, high-speed ADC, and CAN is purpose-built for these embedded control tasks.
When designing with this device, keep analog and digital ground returns separated under the IC and place ADC reference capacitors within 5 mm of the AVSS/AVDD pins to preserve ADC SNR. The DSP engine requires careful attention to interrupt latency; reserve one interrupt priority level exclusively for the ADC end-of-conversion handler that triggers the control loop.
This page consolidates distributor pricing, drop-in compatible Microchip variants, motor-control design notes, and AEC-Q100-grade guidance not aggregated on a single supplier page.
Bộ thay thế dễ dàng lắp đặt cho DSPIC33FJ128MC710A-I/PT — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với DSPIC33FJ128MC710A-I/PT (cùng hình factor và footprint) — khác nhau ở Package, Operating Temperature, ADC, Core Architecture, Maximum CPU Speed.
DSPIC33FJ128MC706A-I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC510A-I/PF
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC706-I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC708AT-I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC510A-E/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →DSPIC33FJ128MC710A-I/PT Tỷ lệ tối đa & tính chất điện
| Core | dsPIC33F 16-bit DSC with DSP engine |
| Maximum CPU Speed | 40 MIPS (40 MHz) |
| Program Memory (Flash) | 128 KB |
| Data RAM | 16 KB |
| Operating Voltage | 3.0 V to 3.6 V |
| Nhiệt độ hoạt động | -40 C to +85 C (Industrial "-I") |
| Hộp | TQFP-100 (PT), 12 x 12 mm, 0.4 mm pitch |
| Motor-Control PWM Channels | 6 outputs, up to 8 complementary pairs |
| PWM Resolution / Frequency | 16-bit, up to ~117 kHz PWM at 40 MIPS |
| ADC | 12-bit, up to 32 channels, 1 Msps |
| DMA Channels | 8 |
| Timers | 9 (16-bit/32-bit mix) |
| Communication | 1x CAN 2.0B, 2x UART, 2x SPI, 1x I2C, PMP |
| I/O Pins | 85 (approx., varies by peripheral remap) |
| Kiểu lắp đặt | Surface Mount |
| Cấp MSL | MSL3 (per JEDEC J-STD-020) |
| Trạng thái RoHS | Compliant |
Cấu hình chân DSPIC33FJ128MC710A-I/PT
| Chân 1 | SDA/RP15/CN12/PMD15/RB15 — I2C data or GPIO |
| Chân 2 | SCL/RP14/CN11/PMD14/RB14 — I2C clock or GPIO |
| Chân 3 | AN0/CN2/RA0 — Analog input 0 |
| Chân 4 | AN1/CN3/RA1 — Analog input 1 |
| Chân 5 | AN2/CN4/RP19/CN42/RB0 — Analog input 2 or remappable peripheral |
| Chân 6 | AN3/CN5/RP20/CN43/RB1 — Analog input 3 or remappable peripheral |
| Chân 7 | AN4/CN6/RP21/CN44/RB2 — Analog input 4 or remappable peripheral |
| Chân 8 | AN5/CN7/RP22/CN45/RB3 — Analog input 5 or remappable peripheral |
| Chân 9 | AVDD — Analog supply voltage |
| Chân 10 | AVSS — Analog ground |
| Chân 11 | AN6/CN8/RP23/CN46/RB4 — Analog input 6 or remappable peripheral |
| Chân 12 | AN7/CN9/RP24/CN47/RB5 — Analog input 7 or remappable peripheral |
| Chân 13 | AN8/CN1/RP25/CN48/RB6 — Analog input 8 or remappable peripheral |
| Chân 14 | AN9/CN0/RP26/CN49/RB7 — Analog input 9 or remappable peripheral |
| Chân 15 | AN10/CN32/RP27/CN50/RB8 — Analog input 10 or remappable peripheral |
| Chân 16 | AN11/CN33/RP28/CN51/RB9 — Analog input 11 or remappable peripheral |
| Chân 17 | AN12/CN34/RP29/CN52/RB10 — Analog input 12 or remappable peripheral |
| Chân 18 | AN13/CN35/RP30/CN53/RB11 — Analog input 13 or remappable peripheral |
| Chân 19 | AN14/CN36/RP31/CN54/RB12 — Analog input 14 or remappable peripheral |
| Chân 20 | AN15/CN37/CN55/RB13 — Analog input 15 |
| Chân 21 | VDD — Digital supply voltage |
| Chân 22 | VSS — Digital ground |
| Chân 23 | TMS/RP32/CN10/RB12 — JTAG test mode select (alternate function) |
| Chân 24 | TCK/CN11/RB13 — JTAG test clock |
| Chân 25 | TDI/RP33/CN12/RB14 — JTAG test data input |
| Chân 26 | TDO/RP34/CN13/RB15 — JTAG test data output |
| Chân 27 | MCLR — Master clear reset (active-low) |
| Chân 28 | OSC1/CLKI — Crystal oscillator input or external clock |
| Chân 29 | OSC2/CLKO — Crystal oscillator output |
| Chân 30 | FLTA1/INT0/CN17/RD0 — PWM fault input or external interrupt 0 |
| Chân 31 | FLTA2/INT1/CN18/RD1 — PWM fault input or external interrupt 1 |
| Chân 32 | FLTA3/INT2/CN3/RD2 — PWM fault input or external interrupt 2 |
| Chân 33 | FLTA4/INT3/CN4/RD3 — PWM fault input or external interrupt 3 |
| Chân 34 | FLTA5/INT4/CN5/RD4 — PWM fault input or external interrupt 4 |
| Chân 35 | PWM1H/RP35/CN19/RE0 — PWM output 1 high-side |
| Chân 36 | PWM1L/RP36/CN20/RE1 — PWM output 1 low-side |
| Chân 37 | PWM2H/RP37/CN21/RE2 — PWM output 2 high-side |
| Chân 38 | PWM2L/RP38/CN22/RE3 — PWM output 2 low-side |
| Chân 39 | PWM3H/RP39/CN23/RE4 — PWM output 3 high-side |
| Chân 40 | PWM3L/RP40/CN24/RE5 — PWM output 3 low-side |
| Chân 41 | PWM4H/RP41/CN25/RE6 — PWM output 4 high-side |
| Chân 42 | PWM4L/RP42/CN26/RE7 — PWM output 4 low-side |
| Chân 43 | VDD — Digital supply voltage |
| Chân 44 | VSS — Digital ground |
| Chân 45 | PWM5H/RP43/CN27/RF0 — PWM output 5 high-side |
| Chân 46 | PWM5L/RP44/CN28/RF1 — PWM output 5 low-side |
| Chân 47 | PWM6H/RP45/CN29/RF2 — PWM output 6 high-side |
| Chân 48 | PWM6L/RP46/CN30/RF3 — PWM output 6 low-side |
| Chân 49 | C1RX/RP47/CN31/RF4 — CAN1 receive or remappable peripheral |
| Chân 50 | C1TX/RP48/CN32/RF5 — CAN1 transmit or remappable peripheral |
| Chân 51 | U1RX/RP49/CN33/RF6 — UART1 receive or remappable peripheral |
| Chân 52 | U1TX/RP50/CN34/RF7 — UART1 transmit or remappable peripheral |
| Chân 53 | U2RX/RP51/CN35/RF8 — UART2 receive or remappable peripheral |
| Chân 54 | U2TX/RP52/CN36/RF9 — UART2 transmit or remappable peripheral |
| Chân 55 | SCK1/RP53/CN37/RG0 — SPI1 clock or remappable peripheral |
| Chân 56 | SDI1/RP54/CN38/RG1 — SPI1 data input or remappable peripheral |
| Chân 57 | SDO1/RP55/CN39/RG2 — SPI1 data output or remappable peripheral |
| Chân 58 | SS1/RP56/CN40/RG3 — SPI1 slave select or remappable peripheral |
| Chân 59 | SCK2/RP57/CN41/RG4 — SPI2 clock or remappable peripheral |
| Chân 60 | SDI2/RP58/CN42/RG5 — SPI2 data input or remappable peripheral |
| Chân 61 | SDO2/RP59/CN43/RG6 — SPI2 data output or remappable peripheral |
| Chân 62 | SS2/RP60/CN44/RG7 — SPI2 slave select or remappable peripheral |
| Chân 63 | VDD — Digital supply voltage |
| Chân 64 | VSS — Digital ground |
| Chân 65 | C2RX/RP61/CN45/RG8 — CAN2 receive or remappable peripheral |
| Chân 66 | C2TX/RP62/CN46/RG9 — CAN2 transmit or remappable peripheral |
| Chân 67 | IC1/RP63/CN47/RG10 — Input capture 1 or remappable peripheral |
| Chân 68 | IC2/RP64/CN48/RG11 — Input capture 2 or remappable peripheral |
| Chân 69 | IC3/RP65/CN49/RG12 — Input capture 3 or remappable peripheral |
| Chân 70 | IC4/RP66/CN50/RG13 — Input capture 4 or remappable peripheral |
| Chân 71 | OC1/RP67/CN51/RG14 — Output compare 1 or remappable peripheral |
| Chân 72 | OC2/RP68/CN52/RG15 — Output compare 2 or remappable peripheral |
| Chân 73 | OC3/RP69/CN53/RG0 — Output compare 3 or remappable peripheral |
| Chân 74 | OC4/RP70/CN54/RG1 — Output compare 4 or remappable peripheral |
| Chân 75 | PMA0/CN55/RH0 — Parallel master port address 0 |
| Chân 76 | PMA1/CN56/RH1 — Parallel master port address 1 |
| Chân 77 | PMA2/CN57/RH2 — Parallel master port address 2 |
| Chân 78 | PMA3/CN58/RH3 — Parallel master port address 3 |
| Chân 79 | PMD0/CN59/RH4 — Parallel master port data 0 |
| Chân 80 | PMD1/CN60/RH5 — Parallel master port data 1 |
| Chân 81 | PMD2/CN61/RH6 — Parallel master port data 2 |
| Chân 82 | PMD3/CN62/RH7 — Parallel master port data 3 |
| Chân 83 | PMD4/CN63/RH8 — Parallel master port data 4 |
| Chân 84 | PMD5/CN64/RH9 — Parallel master port data 5 |
| Chân 85 | PMD6/CN65/RH10 — Parallel master port data 6 |
| Chân 86 | PMD7/CN66/RH11 — Parallel master port data 7 |
| Chân 87 | VDD — Digital supply voltage |
| Chân 88 | VSS — Digital ground |
| Chân 89 | PMD8/CN67/RH12 — Parallel master port data 8 |
| Chân 90 | PMD9/CN68/RH13 — Parallel master port data 9 |
| Chân 91 | PMD10/CN69/RH14 — Parallel master port data 10 |
| Chân 92 | PMD11/CN70/RH15 — Parallel master port data 11 |
| Chân 93 | PMD12/CN71/RJ0 — Parallel master port data 12 |
| Chân 94 | PMD13/CN72/RJ1 — Parallel master port data 13 |
| Chân 95 | PMD14/CN73/RJ2 — Parallel master port data 14 |
| Chân 96 | PMD15/CN74/RJ3 — Parallel master port data 15 |
| Chân 97 | PMRD/CN75/RJ4 — Parallel master port read strobe |
| Chân 98 | PMWR/CN76/RJ5 — Parallel master port write strobe |
| Chân 99 | PMCS/CN77/RJ6 — Parallel master port chip select |
| Chân 100 | PMALL/CN78/RJ7 — Parallel master port address latch |
Ứng dụng tiêu biểu
DSPIC33FJ128MC710A-I/PT phù hợp cho 6 Áp dụngs: Brushless DC Motor Drive (BLDC / PMSM), Three-Phase Induction Motor VFD, Switched Reluctance Motor (SRM) Drive, Solar Micro-Inverter / Power Optimizer, CAN-Connected Industrial Sensor Node, Automotive Accessory Drive (AEC-Q100 grade required).
Brushless DC Motor Drive (BLDC / PMSM)
The DSPIC33FJ128MC710A-I/PT drives BLDC and PMSM motors in three-phase sinusoidal or trapezoidal commutation. Its six 16-bit motor-control PWM outputs deliver up to 8 complementary pairs with 7.5 ns dead-time resolution, enabling 25 kHz switching frequencies for IGBT or MOSFET inverters up to 5 kW. The 12-bit 1 Msps ADC with four simultaneous sample-and-hold channels performs phase-current sensing for field-oriented control without external current shunts amplifiers. The dsPIC33F DSP engine executes Clarke and Park transforms in single-cycle MAC operations, supporting sensorless FOC algorithms (e.g., Microchip AN1078) within tight 25 kHz control loops. Per family datasheet (DS70584D), the integrated CAN 2.0B module allows multi-axis slave drives to communicate over industrial CANopen or CAN-FD bridges. The TQFP-100 footprint exposes all PWM, ADC, and communication pins without external muxing.
Được đề xuất
Three-Phase Induction Motor VFD
The DSPIC33FJ128MC710A-I/PT fits variable-frequency drives (VFD) for industrial three-phase induction motors using sensorless indirect field-oriented control. The 16 KB SRAM buffers trajectory references for the speed regulator, while the 128 KB Flash stores full V/F and FOC firmware libraries including the Microchip ACIM reference design. The six PWM outputs drive a 600 V IGBT bridge at 4-16 kHz switching frequency with programmable dead-time. The 12-bit ADC samples DC-bus voltage, phase currents, and temperature simultaneously, with DMA moving conversion results directly into control-loop buffers without CPU overhead. The dsPIC33F DSP engine accelerates the inverse Park transform at the PWM reload rate, enabling sub-microsecond feedback latency. The integrated CAN 2.0B supports Modbus/CANopen industrial networks for VFD integration. The industrial -40 C to +85 C temperature range suits fan-cooled industrial cabinets.
Được đề xuất
Switched Reluctance Motor (SRM) Drive
The DSPIC33FJ128MC710A-I/PT is well suited for switched reluctance motor drives requiring independent control of each phase. With six PWM outputs the DSC can drive the asymmetric half-bridge topology of a 3-phase SRM directly, while 32 ADC channels monitor phase currents and rotor position sensors. The dsPIC33F DSP engine computes the non-linear flux/ torque LUT for SRM commutation at 20-50 kHz loop rates, and 16 KB SRAM stores commutation angle tables. Per family datasheet (DS70584D), the integrated CAN enables networked SRM drive clusters in industrial automation. The -40 C to +85 C industrial temperature grade supports harsh factory-floor environments with elevated ambient temperatures. The 100-pin TQFP exposes the full peripheral set including the parallel PMP for external SRAM expansion.
Được đề xuất
Solar Micro-Inverter / Power Optimizer
The DSPIC33FJ128MC710A-I/PT runs MPPT and inverter control loops in solar micro-inverters and DC power optimizers. The six PWM outputs drive a totem-pole or H-bridge stage, while the 12-bit 1 Msps ADC samples PV string current/voltage for perturb-and-observe or incremental-conductance MPPT. The DSP engine executes 32-bit DSP transforms (Goertzel, sliding FFT) for grid-synchronization in compliance with IEEE 1547 anti-islanding tests. The 128 KB Flash stores the complete firmware image including grid-tie state machine, MPPT algorithm, and safety routines. The integrated CAN allows daisy-chained panel-level monitoring. The 3.0-3.6 V supply with low quiescent supports battery-backed operation during night-time telemetry.
Được đề xuất
CAN-Connected Industrial Sensor Node
The DSPIC33FJ128MC710A-I/PT functions as a CAN-enabled industrial sensor node for factory automation, processing analog sensor inputs (temperature, pressure, vibration) and publishing them over CANopen or DeviceNet. The 12-bit ADC with up to 32 channels digitizes analog sensor arrays, while the dsPIC33F DSP engine runs digital filters (FIR/IIR) to clean sensor data in real time. The CAN 2.0B module with hardware filtering offloads communication from the CPU, and the eight DMA channels move ADC results into buffers without CPU intervention. The 128 KB Flash supports full CANopen stack (CiA 301/402) plus sensor processing. The 16 KB SRAM is sufficient for 4 KB sensor buffer plus CAN stack. The industrial -40 C to +85 C temperature range supports factory-floor deployment.
Được đề xuất
Automotive Accessory Drive (AEC-Q100 grade required)
For automotive accessory motors (electric power steering, HVAC blowers, water pumps, electric parking brakes), the DSPIC33FJ128MC708AT-I/PT is the AEC-Q100-qualified variant of this die and shares the same TQFP-100 (12x12 mm) footprint. The base DSPIC33FJ128MC710A-I/PT is industrial-grade; for AEC-Q100 systems the A-grade automotive variant is mandatory. Both share 40 MIPS performance, 128 KB Flash, 16 KB RAM, 6 PWM outputs, and CAN 2.0B. The 12-bit ADC samples phase currents with simultaneous sampling for FOC of the accessory motor, and the dsPIC33F DSP engine executes sensorless FOC in tight loops. The integrated CAN bus is the de-facto automotive network for ECU integration.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho DSPIC33FJ128MC710A-I/PT — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | DSPIC33FJ128MC706A-I/PT | DSPIC33FJ128MC510A-I/PF | DSPIC33FJ128MC706-I/PT | DSPIC33FJ128MC708AT-I/PT | DSPIC33FJ128MC510A-E/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | TQFP-100 (12x12 mm) | TQFP-100 (12x12 mm) - same | TQFP-100 (14x14 mm) | TQFP-100 (12x12 mm) - same | TQFP-100 (12x12 mm) - same | TQFP-100 (14x14 mm) |
| Core / Max CPU Speed | dsPIC33F / 40 MIPS | dsPIC33F / 40 MIPS | dsPIC33F / 40 MIPS | dsPIC33F / 40 MIPS | dsPIC33F / 40 MIPS | dsPIC33F / 40 MIPS |
| Program Memory (Flash) | 128 KB | 64 KB | 128 KB | 64 KB | 128 KB | 128 KB |
| Data RAM | 16 KB | 8 KB | 16 KB | 8 KB | 16 KB | 16 KB |
| ADC | 12-bit, 32 ch, 1 Msps | 12-bit, 16 ch, 1 Msps | 10-bit, 32 ch, 1 Msps | 12-bit, 16 ch, 1 Msps | 12-bit, 32 ch, 1 Msps | 10-bit, 32 ch, 1 Msps |
| Operating Temperature | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +85 C (Industrial) | -40 C to +125 C (Automotive) | -40 C to +125 C (Extended) |
| AEC-Q100 Grade | Not qualified (Industrial) | Not qualified (Industrial) | Not qualified (Industrial) | Not qualified (Industrial) | AEC-Q100 qualified | AEC-Q100 qualified |
| CAN 2.0B Module | 1 | 1 | 2 | 1 | 1 | 2 |
Bảo phân biệt quan trọng
- Largest memory in dsPIC33FJ128MC7xx family (vsDSPIC33FJ128MC706A-I/PT)
- 12-bit ADC vs 10-bit ADC for current sensing accuracy (vsDSPIC33FJ128MC510A-I/PF)
- Dual CAN module vs single CAN in older dsPIC33F MC family (vsDSPIC33FJ128MC706A-I/PT)
- Industrial -I grade vs original non-suffixed silicon (vsDSPIC33FJ128MC706-I/PT)
Ghi chú thiết kế
The TQFP-100 (12x12 mm) package has a typical theta_JA of 41 C/W (4-layer PCB, still air). At 40 MIPS, full peripheral activity, and 3.3 V supply, the DSPIC33FJ128MC710A-I/PT typically dissipates around 240 mW, leading to a 10 C junction temperature rise above ambient. For industrial -40 C to +85 C operation this is acceptable with a small copper thermal pad under the exposed die flag. Avoid placing hot power components (MOSFET drivers, DC-DC converters) within 10 mm of the DSC to prevent thermal cross-heating.
Separate analog and digital ground returns under the IC. Connect AVSS and VSS at a single point near the IC with a wide trace. Place the 10 uF + 0.1 uF AVDD decoupling capacitor pair within 5 mm of the AVDD pin, and route analog ADC inputs away from PWM switching traces. Per family datasheet (DS70584D), the ADC achieves its 1 Msps throughput and 12-bit linearity only with proper analog supply decoupling and matched source impedances below 1 kohm.
Configure the oscillator with the proper PLL ratio (e.g., 8 MHz external crystal with PLL x10 for 80 MHz FCY / 40 MIPS). Do not exceed the 3.6 V absolute maximum on VDD - this permanently damages the DSC. The MCLR pin must have a 10 kohm pull-up to VDD and a 100 nF capacitor to ground for clean reset; absence causes spurious brown-out resets. Do not leave PWM outputs floating; unused PWM pairs must be disabled in software and tied to known states through peripheral remap.
The TQFP-100 (12x12 mm) has 0.4 mm pin pitch - this requires 4-mil trace/space PCB rules. Use 8-mil vias and 0.2 mm via-in-pad with solder mask defined pads for the inner row of pins to keep the breakout routable on 4 layers. Place a continuous GND plane on layer 2 under the DSC and stitch vias on a 5 mm grid around the package perimeter. Keep JTAG TMS/TCK/TDI/TDO traces short (under 50 mm) and length-matched to within 25 mm to avoid debug-port timing errors.
PWM outputs switching at 25 kHz with 7.5 ns edges produce harmonics into the 50-200 MHz band. Place a ferrite bead in series with each PWM pair near the DSC, and keep the gate-drive traces short (under 30 mm) to limit EMI. For CAN bus signal integrity, use twisted-pair wiring with 120 ohm termination at each end, and a common-mode choke (e.g., TDK ACM2012) within 10 mm of the MCP2551 CAN transceiver. The dsPIC33F DSP engine core clock (80 MHz FCY) can couple into analog ADC inputs; route the analog signals on layer 1 with the GND plane underneath on layer 2 to form a stripline with -60 dB common-mode rejection.
Thông tin tuân thủ
RoHS and REACH compliant per Microchip product page (microchip.com/en-us/product/dsPIC33FJ128MC710A). The DSPIC33FJ128MC710A-I/PT is industrial-grade (-40 C to +85 C) and is NOT AEC-Q100 qualified - for automotive applications select the DSPIC33FJ128MC708AT-I/PT variant. JEDEC J-STD-020 MSL3 moisture sensitivity level applies; bake-out before soldering if exposure exceeds 168 hours.
