DSPIC33FJ128MC708AT-I/PT - 16-Bit 40MIPS 128KB Flash DSC | Microchip
MPN: DSPIC33FJ128MC708AT-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.87 | $7.87 |
| 10 | $7.1 | $71.00 |
| 100 | $6.35 | $635.00 |
| 500 | $5.55 | $2,775.00 |
| 1,000 | $4.8 | $4,800.00 |
DSPIC33FJ128MC708AT-I/PT Overview
A Digital Signal Controller is a hybrid class of embedded processor that merges the deterministic interrupt response and peripheral set of a microcontroller with the multiply-accumulate (MAC) throughput and zero-overhead looping of a DSP. In the wider taxonomy, the dsPIC33FJ128MC708A sits as DSC -> 16-bit DSC -> dsPIC33F family -> Microchip 16-bit embedded portfolio -> Microcontroller (MCU). The dedicated Motor Control PWM (MCPWM), Quadrature Encoder Interface (QEI), and high-speed ADC make the device a common choice for field-oriented control (FOC) loops and other real-time closed-loop systems.
Key specifications include 16 KB SRAM, 128 KB Flash with self-programmability, ECAN, I2C, SPI and UART peripherals, dual analog comparators, up to 69 digital I/O pins, and a 10/12-bit ADC with multiple S&H channels. The integrated DSP engine performs single-cycle MAC operations while the microcontroller core retains full C-language programmability through MPLAB X IDE and the MPLAB XC16 compiler toolchain.
The device uses a Harvard-architecture modified MCU core with an enhanced instruction set that includes DSP primitives (MAC, ED, EDAC) issued in parallel with standard MCU ALU operations. Program fetch is 32-bit wide from Flash; data buses are 16-bit wide for X and Y memory. The integrated motor-control peripherals (PWM, QEI, ADC with PWM synchronization) reduce external component count and CPU overhead when implementing FOC or trapezoidal commutation.
Typical applications span 3-phase BLDC/PMSM motor drives, ACIM variable-frequency drives, switched-reluctance motor control, servo/robotics position loops, automotive mechatronics, industrial fans and pumps, sensorless control with BEMF/Flux observers, and digital power conversion. The wide 3.0 V to 3.6 V supply range and -40 °C to +85 °C industrial temperature grade suit both factory-floor and harsh-environment deployment.
When designing with this DSC, allocate the 3.3 V supply from a low-noise LDO and provide bulk + decoupling on every AVDD/VDD pair. The ADC inputs share digital I/O on many pins, so plan pin assignments before PCB layout to avoid rework.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that go beyond what the manufacturer datasheet alone provides.
Drop-in alternatives for DSPIC33FJ128MC708AT-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128MC708AT-I/PT (same form factor and footprint) — differing in Operating Temperature, Package, Mounting Type, Audio Interface, Communication Peripherals.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128MC708A-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128MC708T-I/PT
✅ Drop-In✓ In Stock
$6.75 / Unit
View Datasheet →DSPIC33FJ128MC706A-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128GP708A-I/PT
✅ Drop-In✓ In Stock
$11.8 / Unit
View Datasheet →DSPIC33FJ128GP710A-I/PF
✅ Drop-In✓ In Stock
$8.9 / Unit
View Datasheet →DSPIC33FJ128MC708AT-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | dsPIC33F 16-bit DSC |
| CPU Speed | 40 MIPS at 80 MHz CPU clock |
| Program Memory | 128 KB Flash |
| Data Memory (SRAM) | 16 KB |
| Package | 80-pin TQFP (PT), 12x12 mm, 0.5 mm pitch |
| Supply Voltage (VDD) | 3.0 V to 3.6 V |
| Operating Temperature | -40 C to +85 C (Industrial) |
| I/O Pins | 69 |
| ADC | 10/12-bit, 2.5 Msps, multi-channel with S&H |
| Communication Peripherals | ECAN, I2C, SPI, UART |
| Motor Control PWM | Yes (MCPWM with PWM-Synchronized ADC) |
| Quadrature Encoder Interface (QEI) | Yes |
| Analog Comparators | 2 |
| Timers | Multiple 16-bit and 32-bit timer/counters |
| DMA | 8-channel DMA |
| Mounting Type | Surface Mount (Tape & Reel) |
| RoHS Status | Compliant |
| MSL Level | 3 (per JEDEC J-STD-020) |
DSPIC33FJ128MC708AT-I/PT Pin Configuration
| Pin 1 | OSC1/RA0 — Crystal oscillator input / GPIO |
| Pin 2 | OSC2/RA1 — Crystal oscillator output / GPIO |
| Pin 3 | MCLR — Master Clear (reset) input |
| Pin 4 | PGED1/RB0 — Programming/debug data + GPIO |
| Pin 5 | PGEC1/RB1 — Programming/debug clock + GPIO |
| Pin 6 | AN0/RB2 — Analog input 0 / GPIO |
| Pin 7 | AN1/RB3 — Analog input 1 / GPIO |
| Pin 8 | AN2/RC1 — Analog input 2 / GPIO |
| Pin 9 | AN3/RC2 — Analog input 3 / GPIO |
| Pin 10 | AN4/RC3 — Analog input 4 / GPIO |
| Pin 11 | AN5/RC4 — Analog input 5 / GPIO |
| Pin 12 | VSS — Digital ground |
| Pin 13 | VDD — Digital supply 3.0-3.6 V |
| Pin 14 | PWM1H/RE0 — PWM output 1 high-side |
| Pin 15 | PWM1L/RE1 — PWM output 1 low-side |
| Pin 16 | PWM2H/RE2 — PWM output 2 high-side |
| Pin 17 | PWM2L/RE3 — PWM output 2 low-side |
| Pin 18 | PWM3H/RE4 — PWM output 3 high-side |
| Pin 19 | PWM3L/RE5 — PWM output 3 low-side |
| Pin 20 | QEA/RD0 — QEI phase A input / GPIO |
| Pin 21 | QEB/RD1 — QEI phase B input / GPIO |
| Pin 22 | INDX/RD2 — QEI index input / GPIO |
| Pin 23 | HOME/RD3 — QEI home input / GPIO |
| Pin 24 | VDD — Digital supply |
| Pin 25 | VSS — Digital ground |
| Pin 26 | INT0/RD4 — External interrupt 0 / GPIO |
| Pin 27 | INT1/RD5 — External interrupt 1 / GPIO |
| Pin 28 | INT2/RD6 — External interrupt 2 / GPIO |
| Pin 29 | INT3/RD7 — External interrupt 3 / GPIO |
| Pin 30 | RF0 — GPIO |
| Pin 31 | RF1 — GPIO |
| Pin 32 | RF2 — GPIO |
| Pin 33 | RF3 — GPIO |
| Pin 34 | RF4 — GPIO |
| Pin 35 | RF5 — GPIO |
| Pin 36 | RF6 — GPIO |
| Pin 37 | RF7 — GPIO |
| Pin 38 | RG0 — GPIO |
| Pin 39 | RG1 — GPIO |
| Pin 40 | RG2 — GPIO |
| Pin 41 | RG3 — GPIO |
| Pin 42 | AVSS — Analog ground |
| Pin 43 | AVDD — Analog supply 3.0-3.6 V |
| Pin 44 | VREF-/RA9 — ADC reference negative |
| Pin 45 | VREF+/RA10 — ADC reference positive |
| Pin 46 | AN6/RB4 — Analog input 6 / GPIO |
| Pin 47 | AN7/RB5 — Analog input 7 / GPIO |
| Pin 48 | AN8/RB6 — Analog input 8 / GPIO |
| Pin 49 | AN9/RB7 — Analog input 9 / GPIO |
| Pin 50 | AN10/RB8 — Analog input 10 / GPIO |
| Pin 51 | AN11/RB9 — Analog input 11 / GPIO |
| Pin 52 | AN12/RB10 — Analog input 12 / GPIO |
| Pin 53 | AN13/RB11 — Analog input 13 / GPIO |
| Pin 54 | AN14/RB12 — Analog input 14 / GPIO |
| Pin 55 | AN15/RB13 — Analog input 15 / GPIO |
| Pin 56 | VSS — Digital ground |
| Pin 57 | VDD — Digital supply |
| Pin 58 | U1RX/RC13 — UART1 receive / GPIO |
| Pin 59 | U1TX/RC14 — UART1 transmit / GPIO |
| Pin 60 | U2RX/RC15 — UART2 receive / GPIO |
| Pin 61 | SCK1/RG6 — SPI1 clock / GPIO |
| Pin 62 | SDI1/RG7 — SPI1 data in / GPIO |
| Pin 63 | SDO1/RG8 — SPI1 data out / GPIO |
| Pin 64 | SS1/RG9 — SPI1 slave select / GPIO |
| Pin 65 | SDA1/RG3 — I2C1 data (note: pin shared - see datasheet) |
| Pin 66 | SCL1/RG2 — I2C1 clock (note: pin shared - see datasheet) |
| Pin 67 | C1RX/RF0 — ECAN1 receive / GPIO |
| Pin 68 | C1TX/RF1 — ECAN1 transmit / GPIO |
| Pin 69 | TDI/RB14 — JTAG TDI / GPIO |
| Pin 70 | TDO/RB15 — JTAG TDO / GPIO |
| Pin 71 | TCK/RA1 — JTAG TCK / GPIO (shared with OSC2) |
| Pin 72 | TMS/RA0 — JTAG TMS / GPIO (shared with OSC1) |
| Pin 73 | PWM4H/RE6 — PWM output 4 high-side |
| Pin 74 | PWM4L/RE7 — PWM output 4 low-side |
| Pin 75 | PWM5H/RE8 — PWM output 5 high-side |
| Pin 76 | PWM5L/RE9 — PWM output 5 low-side |
| Pin 77 | VSS — Digital ground |
| Pin 78 | VDD — Digital supply |
| Pin 79 | PWM6H/RE10 — PWM output 6 high-side |
| Pin 80 | PWM6L/RE11 — PWM output 6 low-side |
Typical Applications
DSPIC33FJ128MC708AT-I/PT is suitable for 6 applications: 3-Phase BLDC / PMSM Motor Drive, ACIM Variable-Frequency Drive (VFD), Switched-Reluctance Motor (SRM) Control, Industrial Servo and Robotics Position Control, Digital Power Conversion (DC-DC, PFC, Inverter), Automotive Mechatronics (Body Electronics, HVAC Actuators).
3-Phase BLDC / PMSM Motor Drive
The DSPIC33FJ128MC708AT-I/PT is purpose-built for 3-phase BLDC and PMSM motor drives, where its integrated 6-output Motor Control PWM (MCPWM) with programmable dead-time directly drives the gate drivers of a 3-phase inverter. The on-chip 10/12-bit ADC with PWM-synchronized sampling captures phase currents at the center of the PWM duty cycle, giving noise-immune current feedback for FOC (Field-Oriented Control) loops. With 40 MIPS throughput, the dsPIC33F core executes Clarke/Park transforms, SVPWM modulation, and PI controllers within a single 25 kHz control period - sufficient for 4-pole motor speeds up to 60,000 RPM. The QEI module directly reads incremental encoder inputs, eliminating external logic. Reference: Microchip Application Note AN1078.
Recommended
ACIM Variable-Frequency Drive (VFD)
AC induction motor (ACIM) VFDs benefit from the DSPIC33FJ128MC708AT-I/PT's DSP engine running V/Hz and sensorless field-oriented control. The 16-bit DSP MAC units handle slip calculation and rotor-flux estimation at the 8-16 kHz control update rate typical of industrial drives. Hardware QEI accepts encoder pulses for closed-loop VFDs without external counters, while the ECAN peripheral lets the drive sit on a CANopen or Modbus/CAN bus inside factory automation networks. The 80-pin TQFP provides enough I/O for 3-phase inverter PWM plus keypad, display, and analog command inputs. Reference: Microchip AN1160 induction motor control guide.
Recommended
Switched-Reluctance Motor (SRM) Control
Switched-reluctance motor drives require precise angular-position-triggered PWM pulses and rotor-position-based commutation - exactly what the DSPIC33FJ128MC708AT-I/PT's QEI + MCPWM combination provides. The high-speed ADC reads phase currents during the demagnetization interval for indirect flux estimation. With 128 KB Flash, full state-machine firmware including torque-sharing functions fits without external memory, and the 16 KB SRAM supports the lookup tables for commutation angles vs rotor speed. Industrial-grade -40 to +85 C operation suits outdoor and factory-deployed SRM pumps and compressors.
Recommended
Industrial Servo and Robotics Position Control
For CNC, robotics, and servo position loops, the DSPIC33FJ128MC708AT-I/PT's 40 MIPS performance and QEI peripheral handle multi-axis PID control up to 10 kHz per axis. The DSC's hardware multiply-accumulate and zero-overhead loop instructions keep the PID + trajectory planner code under 5 microseconds per axis, leaving CPU headroom for Ethernet or RS-485 host communication via the ECAN/UART peripherals. The 69 available I/O pins accommodate limit switches, home sensors, and brake-control outputs for typical 3-axis servo panels. Reference: Microchip AN1115 servo-control firmware framework.
Recommended
Digital Power Conversion (DC-DC, PFC, Inverter)
Digital power supplies using the DSPIC33FJ128MC708AT-I/PT benefit from the PWM-triggered ADC sampling and high-resolution PWM (1.04 ns at 80 MHz peripheral clock). Average-current-mode control, power-factor correction (PFC) boost converters, and full-bridge phase-shift converters run reliably at 100-500 kHz switching frequencies with 16 KB SRAM dedicated to controller state variables. The ECAN interface enables PMBus-over-CAN telemetry for data-center and telecom DC-DC modules.
Recommended
Automotive Mechatronics (Body Electronics, HVAC Actuators)
The DSPIC33FJ128MC708AT-I/PT's industrial temperature grade (-40 to +85 C), 3.3 V single-supply operation, and ECAN peripheral make it well suited for non-powertrain mechatronics such as HVAC blend-door actuators, headlamp leveling, and seat-positioning motors. The integrated MCPWM outputs drive small brushed or brushless DC actuators directly through low-side gate drivers, and the QEI reads position feedback without external counters. For AEC-Q100 automotive requirements, use the AEC-qualified dsPIC33CK family as the drop-in successor, but for non-safety automotive subsystems the target part remains a cost-effective choice.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128MC708AT-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128MC708A-I/PT | DSPIC33FJ128MC708T-I/PT | DSPIC33FJ128GP708A-I/PT |
|---|---|---|---|---|
| Package | TQFP-80 (PT) 12x12 mm | TQFP-80 (PT) - same | TQFP-80 (PT) - same | TQFP-80 (PT) - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Core | dsPIC33F 16-bit DSC | dsPIC33F DSC - same | dsPIC33F DSC - same | dsPIC33F DSC - same |
| Flash / RAM | 128 KB / 16 KB | 128 KB / 16 KB - same | 128 KB / 16 KB - same | 128 KB / 16 KB - same |
| CPU Speed | 40 MIPS (80 MHz) | 40 MIPS - same | 40 MIPS - same | 40 MIPS - same |
| Motor Control PWM | Yes (MCPWM, 6 outputs) | Yes - same | Yes - same | No (general-purpose variant) |
| QEI Module | Yes | Yes - same | Yes - same | No |
| ECAN | Yes | Yes - same | Yes - same | Yes - same |
| Supply Voltage | 3.0-3.6 V | 3.0-3.6 V - same | 3.0-3.6 V - same | 3.0-3.6 V - same |
| Operating Temperature | -40 to +85 C (Industrial) | -40 to +85 C - same | -40 to +85 C - same | -40 to +85 C - same |
Key Differentiators
- Dedicated 6-output motor-control PWM with programmable dead-time and ADC-trigger synchronization (vs DSPIC33FJ128GP708A-I/PT)
- Integrated QEI module for direct encoder interfacing without external logic (vs DSPIC33FJ128GP708A-I/PT)
- 8-channel DMA engine reducing CPU interrupt load in real-time control loops (vs DSPIC33FJ128MC706A-I/PT)
Design Notes
Estimated: at 80 MHz CPU clock and full peripheral activity, the DSPIC33FJ128MC708AT-I/PT draws approximately 70-100 mA from VDD plus 20 mA from AVDD during ADC conversion, for a total budget of ~120 mA. Source the 3.3 V rail from an LDO with at least 200 mA capacity (e.g., Microchip MCP1700) and place 10 uF bulk + 0.1 uF decoupling pairs within 5 mm of every VDD/AVDD pin group. Tie all VSS/AVSS pins to a single low-impedance ground plane, never to a thin trace. A ferrite bead between digital VDD and analog AVDD reduces ADC switching-noise coupling when the same supply source feeds both rails.
Estimated: at 3.3 V supply with 100 mA typical load, the DSPIC33FJ128MC708AT-I/PT dissipates roughly 0.33 W internally, well within the TQFP-80 thermal envelope (theta_JA ~50 C/W on a 4-layer JEDEC EIA/JESD51 test board). Junction temperature rise above ambient is therefore only ~17 C at room temperature - no heatsink required. If you exceed 100 mA peripheral loading or operate above 70 C ambient, add copper thermal relief under the exposed thermal pad area of the PCB (TQFP-80 PT package does not have an exposed pad, so use via-fanout to inner ground/power planes to spread heat).
Route the analog ADC inputs (AN0-AN15) as far as possible from the PWM switching outputs and digital I/O to minimize capacitive coupling. Keep analog traces over a continuous ground plane (no signal traces underneath). Use a 4-layer stackup with dedicated VDD, GND, and signal layers for any design sampling ADC at >500 ksps. Place the 0.1 uF decoupling capacitor directly between each VDD pin and its nearest GND via - no shared vias. The PGED1/PGEC1 pins (RB0/RB1) should route straight to a 6-pin ICSP header on the board edge for MPLAB ICD/Snap debugger access during development.
Do not enable the ADC and PWM modules simultaneously without first configuring the PWM trigger source in the ADC interrupt controller - the default reset state can cause the ADC to sample during PWM switching edges, injecting switching noise into the current-sense channels. Always initialize the oscillator FPLL to 80 MHz before touching the PWM period register, or the PWM frequency will be off by a factor of the FCY divisor. When migrating between dsPIC33F family members (e.g., MC706A <-> MC708A), verify the pinout is identical - the MC706A is a 64-pin TQFP and the MC708A is 80-pin TQFP, so any PCB layout designed for one will not fit the other without rework.
Estimated: the DSPIC33FJ128MC708AT-I/PT's PWM outputs can slew 6 mA loads within ~10 ns, producing edge rates of ~0.3 V/ns into a 50 ohm trace. At these edge rates, treat PWM traces as transmission lines - keep them short (<50 mm), use series termination resistors (22-33 ohm) at the DSC pin, and maintain a constant-impedance path to the gate-driver input. The QEI inputs are particularly sensitive to noise; add 10 kohm pull-ups and 100 pF filter capacitors if the encoder cable exceeds 0.3 m. Reference: Microchip AN1078 sensorless FOC design guide.
Compliance Information
RoHS compliant per Microchip product page. Not AEC-Q100 qualified - for automotive use, select the AEC-qualified dsPIC33CK family. MSL Level 3 per JEDEC J-STD-020 surface-mount handling classification.
