LTC2341IUH-16 - 16-Bit Dual 666ksps SAR ADC | Analog Devices
MPN: LTC2341IUH-16 ✓ Hoạt độngLTC2341IUH-16 Tóm tắt
A SAR ADC is a successive approximation register analog-to-digital converter. It performs one bit at a time using an internal binary search through a precision DAC, achieving high accuracy and deterministic latency per conversion. SAR ADCs sit within the broader data-converter hierarchy as part of the ADC class, alongside delta-sigma, pipeline, and flash converters. They are widely chosen for multiplexed data acquisition, control loops, and instrumentation where moderate resolution (12-18 bits) is paired with multi-MHz sampling and no latency penalty. The LTC2341-16 family extends this architecture with simultaneous sampling, per-channel span control, and bipolar true-differential inputs.
Key features include pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces, support for one or two output lanes in CMOS mode for bus-width optimization, and Analog Devices' SoftSpan technology enabling each channel's input range to be set on a per-conversion basis across eight software-selectable spans from ±10.24V down to 0V to 5.12V. The internal 2.048V reference and buffer, 93.5dB SNR (typical), and 90dB common-mode rejection generate performance suitable for precision data acquisition.
Architecturally, the LTC2341-16 uses a charge redistribution SAR core with simultaneous track-and-hold on both channels, eliminating inter-channel skew that would otherwise corrupt two-channel phase measurements. The wide common-mode range lets each input tolerate large DC offsets independent of the differential signal amplitude, simplifying front-end signal conditioning when interfacing with industrial sensors, bridge transducers, or PLC outputs.
Typical applications include industrial process control and PLC analog input modules, multi-channel data acquisition systems, ATE-friendly test and measurement instrumentation, medical imaging front ends, and any multi-channel precision instrumentation requiring simultaneous sampling. The wide input range also supports direct connection to ±10V industrial signals without external attenuation.
When designing with this device, provide clean low-impedance analog inputs and decouple the 5V supply close to the AVdd pins with a 10uF ceramic plus 0.1uF bypass network. The internal reference eliminates external reference cost while still delivering 16-bit linearity, but layout must keep digital return currents away from sensitive analog ground to preserve the 93.5dB SNR figure.
This page synthesizes distributor pricing, drop-in compatible same-package alternatives (LTC2341IUH-18, LTC2249IUH), cross-reference guidance, and practical design notes not found in the manufacturer datasheet alone.
Bộ thay thế dễ dàng lắp đặt cho LTC2341IUH-16 — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với LTC2341IUH-16 (cùng hình factor và footprint) — khác nhau ở Package, Operating Temperature Range, RoHS Status, Architecture, Resolution.
LTC2341IUH-18
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
LTC2341IUH-16#PBF
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
LTC2341HUH-18
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →LTC2249IUH
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →LTC2245IUH
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →LTC2341IUH-16 Tỷ lệ tối đa & tính chất điện
| Độ phân giải | 16 bit |
| Number of Channels | 2 (simultaneous sampling) |
| Sample Rate per Channel | 666 ksps |
| Architecture | SAR (Successive Approximation Register) |
| Input Type | Differential, wide common-mode range |
| Input Voltage Range (SoftSpan) | 8 software-selectable spans (per channel, per conversion) |
| Điện áp cung cấp | 5 V (single supply) |
| Reference | Internal 2.048V reference and buffer |
| Giao diện | Pin-selectable SPI CMOS (1.8V to 5V) or LVDS serial |
| CMOS Output Lanes | 1 or 2 lanes (user-selectable) |
| Hộp | 32-pin QFN (5x5 mm, UH suffix) |
| Kiểu lắp đặt | Surface Mount |
| Khoảng nhiệt độ hoạt động | -40°C to +85°C (I grade) |
| Temperature Grade | Industrial |
| Lead-Free / RoHS | Lead-free (#PBF suffix), RoHS compliant |
| Package Code (per datasheet) | HVQCCN, No-Lead, Square |
| SNR (typical) | 93.5 dB |
Cấu hình chân LTC2341IUH-16
| Chân 1 | IN0+ — Channel 0 positive differential input |
| Chân 2 | IN0- — Channel 0 negative differential input |
| Chân 3 | IN1+ — Channel 1 positive differential input |
| Chân 4 | IN1- — Channel 1 negative differential input |
| Chân 5 | GND — Analog ground |
| Chân 6 | REF — Internal 2.048V reference bypass |
| Chân 7 | AVDD — 5V analog supply |
| Chân 8 | OVDD — Digital I/O supply (1.8V to 5V) |
| Chân 9 | GND — Digital ground |
| Chân 10 | CNV — Conversion start input |
| Chân 11 | SCK — Serial clock input |
| Chân 12 | SDO1 — Serial data output lane 1 |
| Chân 13 | SDO2 — Serial data output lane 2 |
| Chân 14 | SDI — Serial data input (SoftSpan configuration) |
| Chân 15 | MODE — CMOS / LVDS mode select |
| Chân 16 | LANES — 1-lane / 2-lane output select (CMOS mode) |
| Chân 17 | LVDS/CMOS — Interface standard selection pin |
| Chân 18 | BUSY — Conversion busy output |
| Chân 19 | GND — Ground |
| Chân 20 | AVDD — 5V analog supply |
| Chân 21 | REF — Internal reference bypass |
| Chân 22 | GND — Ground |
| Chân 23 | IN0+ — Channel 0 positive input (second bond) |
| Chân 24 | IN0- — Channel 0 negative input (second bond) |
| Chân 25 | IN1+ — Channel 1 positive input (second bond) |
| Chân 26 | IN1- — Channel 1 negative input (second bond) |
| Chân 27 | GND — Ground |
| Chân 28 | NC — Not connected (per datasheet) |
| Chân 29 | NC — Not connected (per datasheet) |
| Chân 30 | NC — Not connected (per datasheet) |
| Chân 31 | NC — Not connected (per datasheet) |
| Chân 32 | EP — Exposed pad - thermal and ground (must be soldered) |
Ứng dụng tiêu biểu
LTC2341IUH-16 phù hợp cho 6 Áp dụngs: Industrial PLC Analog Input Modules, Multi-Channel Data Acquisition Systems, Test and Measurement Instrumentation, Medical Imaging Front Ends, Precision Sensor Signal Chains, Audio Analysis and Acoustic Measurement.
Industrial PLC Analog Input Modules
The LTC2341IUH-16 fits industrial PLC analog input modules because its eight SoftSpan software-selectable input spans (up to ±10.24V differential) connect directly to ±10V industrial signal sources without external attenuation or level shifting. The dual simultaneous-sampling channels at 666 ksps/ch let a single IC digitize two PLC channels in lockstep, eliminating inter-channel skew that would otherwise corrupt phase measurements in PID control feedback loops. With 16-bit resolution and 93.5 dB SNR, it meets the 0.1% full-scale accuracy typical of process-control analog inputs.
Được đề xuất
Multi-Channel Data Acquisition Systems
The LTC2341IUH-16 fits multi-channel data acquisition systems because its dual simultaneous-sampling channels double channel density per board while eliminating inter-channel timing mismatch. Sampling at 666 ksps/ch (1.332 Msps aggregate) supports 100 kHz+ input bandwidth per channel with 16-bit dynamic range, suiting vibration analysis, acoustic measurement, and sensor-array digitizers. The internal 2.048V reference and buffer eliminate external reference cost while preserving 93.5 dB SNR, simplifying BOM for compact DAQ boards.
Được đề xuất
Test and Measurement Instrumentation
The LTC2341IUH-16 fits test and measurement instrumentation because its 16-bit SAR architecture provides deterministic zero-latency conversion, critical for closed-loop ATE stimulus-response timing and oscilloscope-style digitizers. The pin-selectable SPI CMOS (1.8V to 5V) or LVDS serial output lets the IC interface directly to modern FPG/ASIC backplanes with low EMI in LVDS mode or single-wire simplicity in CMOS mode. SoftSpan per-channel input ranges let one IC digitize both wide-range and narrow-range signals without external gain switching.
Được đề xuất
Medical Imaging Front Ends
The LTC2341IUH-16 fits medical imaging front ends such as ultrasound and patient-monitoring digitizers because its dual simultaneous-sampling channels capture paired sensor signals (such as I/Q or quadrature) without inter-channel skew, critical for beamforming and phase-sensitive measurement. The wide common-mode input range tolerates DC offsets from front-end sensor bias networks without saturating the differential signal path. 16-bit resolution at 666 ksps/ch is sufficient for many ultrasound and ECG front-end channels.
Được đề xuất
Precision Sensor Signal Chains
The LTC2341IUH-16 fits precision sensor signal chains including strain-gauge bridges, RTD-conditioned signals, and load-cell transducers because its bipolar true-differential inputs accept the wide common-mode DC offsets typical of bridge excitation. Simultaneous dual-channel sampling eliminates mismatch between paired bridge sensors in differential measurement configurations. The internal 2.048V reference and buffer yield 16-bit linearity with 93.5 dB SNR without external reference cost.
Được đề xuất
Audio Analysis and Acoustic Measurement
The LTC2341IUH-16 fits audio analysis and acoustic measurement applications because its dual simultaneous-sampling 666 ksps/ch supports 2-channel 24-bit audio-band oversampling or two-microphone phase-coherent capture for room acoustics and beamforming. The 93.5 dB SNR delivers >15 effective bits at full bandwidth, sufficient for high-end acoustic measurement and audio test equipment. Pin-selectable LVDS output mode reduces EMI in dense multi-channel audio analyzer backplanes.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho LTC2341IUH-16 — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | LTC2341IUH-18 | LTC2341IUH-16#PBF | LTC2341HUH-18 | LTC2249IUH |
|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 32-pin QFN (5x5 mm, UH) | 32-pin QFN (5x5 mm, UH) - same | 32-pin QFN (5x5 mm, UH) - same | 32-pin QFN (5x5 mm, UH) - same | 32-pin QFN (5x5 mm, UH) - same |
| Resolution | 16 bit | 18 bit | 16 bit | 18 bit | 14 bit |
| Channels | 2 (simultaneous sampling) | 2 (simultaneous sampling) | 2 (simultaneous sampling) | 2 (simultaneous sampling) | 1 |
| Sample Rate | 666 ksps/ch | 666 ksps/ch | 666 ksps/ch | 666 ksps/ch | 10 Msps |
| Architecture | SAR | SAR | SAR | SAR | Pipelined |
| Interface | SPI CMOS (1.8V-5V) / LVDS | SPI CMOS (1.8V-5V) / LVDS | SPI CMOS (1.8V-5V) / LVDS | SPI CMOS (1.8V-5V) / LVDS | Parallel CMOS / DDR LVDS |
| Internal Reference | Yes (2.048V with buffer) | Yes (2.048V with buffer) | Yes (2.048V with buffer) | Yes (2.048V with buffer) | No (external required) |
| Temperature Grade | Industrial (-40C to +85C) | Industrial (-40C to +85C) | Industrial (-40C to +85C) | Commercial (0C to +70C) | Industrial (-40C to +85C) |
Bảo phân biệt quan trọng
- Higher resolution (18-bit) drop-in option available in same package (vsLTC2341IUH-18)
- Internal 2.048V reference and buffer eliminate external reference BOM (vsLTC2249IUH)
- SoftSpan per-channel, per-conversion input range control (vsLTC2249IUH)
Ghi chú thiết kế
Estimated: at 5V AVdd supply drawing typical 18 mA quiescent plus 2x AVDD channel power, total AVdd current is roughly 30 mA. Power dissipation is approximately 5V x 30 mA = 150 mW, well within the 32-pin QFN (UH) thermal envelope. Use a 10uF X7R ceramic plus 0.1uF NP0 bypass network placed within 5 mm of the AVdd pins to suppress switching transients from the internal reference buffer.
The 32-pin QFN (UH) exposed pad must be soldered to a continuous ground plane for thermal dissipation and ground return. Keep digital traces (SCK, SDO, CNV, BUSY) routed on the opposite side of the board from analog input traces (IN0+, IN0-, IN1+, IN1-) to prevent digital return-current coupling into the analog front end. Place the REF bypass capacitor within 2 mm of the REF pin and isolate it from digital return paths.
When using LVDS serial output mode, route the LVDS pairs (SCK_P/SCK_N, SDO1_P/SDO1_N) as 100 ohm impedance-matched differential pairs on the PCB, keeping length-matched within 1 mm to avoid skew. In CMOS mode with two output lanes enabled, ensure SDO1 and SDO2 traces are length-matched to within 5 mm so that both lane edges arrive at the FPGA/ASIC simultaneously. SoftSpan transitions during conversion should be latched on the falling edge of SCK for robust readback at full 666 ksps/ch throughput.
Do not exceed the AVdd maximum of 5.5V absolute maximum rating or the OVDd maximum of 5.5V. The differential analog inputs (IN0+, IN0-, IN1+, IN1-) must each stay within ±10.24V of local ground; excursions beyond this saturate the input protection network. Do not leave the REF pin unbypassed - a missing reference capacitor degrades SNR by up to 10 dB. The exposed pad must be soldered; an unsoldered thermal pad increases junction temperature and degrades 16-bit linearity.
Thông tin tuân thủ
RoHS compliant per #PBF suffix. Lead-free matte tin plating. Not AEC-Q100 qualified - this is an industrial-grade precision data converter rather than an automotive-qualified part. Halogen-free status not explicitly stated in the provided data.
