MX674ALCWI+T - 12-Bit SAR ADC with Ref, 28-SOIC | Maxim Integrated
MPN: MX674ALCWI+T ✓ Hoạt độngMX674ALCWI+T Tóm tắt
What is a SAR ADC? A successive-approximation analog-to-digital converter is a type of ADC that uses a binary-search algorithm against an internal DAC to resolve an analog input into a digital code, balancing conversion speed with moderate-to-high resolution. SAR ADCs sit in the hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. They are favored over flash converters for moderate resolution (12-16 bits) where lower power, smaller die, and high noise immunity matter more than raw GHz sampling.
Key features include an on-chip buried-Zener reference for long-term stability, 12-bit linearity with +/-1 LSB maximum INL and DNL, three-state output buffers that simplify bus sharing, and a choice of input ranges (0-10 V, +/-5 V, +/-10 V, 0-20 V) selectable via pin strapping. The device also provides a status output (STS) that simplifies polling or interrupt-driven service routines to a host processor.
Typical applications include industrial process-control front-ends, instrumentation data acquisition, motor-control current/voltage sensing, medical patient-monitoring front-ends, and precision transducer signal conditioning. Designers choose the MX674 over 16-bit ADCs when 12-bit dynamic range is acceptable and lower cost / faster conversion is required. The wide SOIC-28 footprint simplifies hand-prototyping and rework compared to small-outline QFN alternatives.
A practical design tip: reserve adequate digital-to-analog ground separation because the internal clock transitions can inject noise into the analog input. Use a single star ground or a solid analog/digital split to preserve 12-bit noise floor performance.
Bộ thay thế dễ dàng lắp đặt cho MX674ALCWI+T — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với MX674ALCWI+T (cùng hình factor và footprint) — khác nhau ở Package, Resolution, Converter Type, Internal Reference, Maximum Conversion Time.
MX674AJCWI
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
MX674AKEWI+T
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
MX674ALEWI+T
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
MAX174ACWI
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →MX574ALEWI+TCDR
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →AD674BBRZ
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
MX674ALCWI+T Tỷ lệ tối đa & tính chất điện
| Độ phân giải | 12 bits |
| Conversion Method | Successive Approximation (SAR) |
| Number of Input Channels | 1 |
| Tỷ lệ lấy mẫu | 66 ksps (approx, typical) |
| Conversion Time | 15 us (max) |
| Architecture | Complete ADC with internal reference and clock |
| Input Voltage Ranges | 0-10 V, +/-5 V, +/-10 V, 0-5 V |
| Supply Voltage - Analog | +5 V and +/-15 V (single +5 V option) |
| Supply Voltage - Digital | +5 V |
| Reference | Internal 10V buried-Zener (external override supported) |
| Output Interface | 12-bit parallel, 3-state, 8/16-bit uP compatible |
| Khoảng nhiệt độ hoạt động | 0C to +70C (Commercial / 'C' grade) |
| Hộp | 28-SOIC (Wide, 0.3 inch pitch) |
| Terminal Form | GULL WING |
| Package Code | SOP, RECTANGULAR |
| Kiểu lắp đặt | Surface Mount |
Cấu hình chân MX674ALCWI+T
| Chân 1 | DB0 — Data bit 0 (LSB), three-state output |
| Chân 2 | DB1 — Data bit 1, three-state output |
| Chân 3 | DB2 — Data bit 2, three-state output |
| Chân 4 | DB3 — Data bit 3, three-state output |
| Chân 5 | DB4 — Data bit 4, three-state output |
| Chân 6 | DB5 — Data bit 5, three-state output |
| Chân 7 | DB6 — Data bit 6, three-state output |
| Chân 8 | DB7 — Data bit 7, three-state output |
| Chân 9 | DB8 — Data bit 8, three-state output |
| Chân 10 | DB9 — Data bit 9, three-state output |
| Chân 11 | DB10 — Data bit 10, three-state output |
| Chân 12 | DB11 — Data bit 11 (MSB), three-state output |
| Chân 13 | STS — Status output, low during conversion |
| Chân 14 | MODE — Mode select (stand-alone vs uP mode) |
| Chân 15 | Vss — -15 V analog supply (or -5 V single-supply) |
| Chân 16 | AGND — Analog ground |
| Chân 17 | REFOUT — +10 V internal reference output |
| Chân 18 | REFIN — Reference input (accepts external +10 V) |
| Chân 19 | BIPOFF — Bipolar offset adjust input |
| Chân 20 | AIN — Analog input |
| Chân 21 | RANGE — Input range select (logic input) |
| Chân 22 | Vcc — +15 V analog supply (or +5 V single-supply) |
| Chân 23 | Vdd — +5 V digital supply |
| Chân 24 | DGND — Digital ground |
| Chân 25 | CE — Chip enable, active high |
| Chân 26 | CS — Chip select, active low |
| Chân 27 | A0 — Byte address / start convert bit |
| Chân 28 | R/C — Read / convert control, active low |
Ứng dụng tiêu biểu
MX674ALCWI+T phù hợp cho 6 Áp dụngs: Industrial Process-Control Data Acquisition, Medical Patient Monitoring Front-End, Precision Transducer Signal Conditioning, Motor Control Current and Voltage Sensing, Test and Measurement Instrumentation, Audio Analyzer and Studio ADC Front-End.
Industrial Process-Control Data Acquisition
The MX674ALCWI+T fits industrial process-control front-ends because of its 12-bit resolution, +/-10 V input range, and +/-15 V industrial supply compatibility that interfaces directly to 4-20 mA loops via current-shunt sense resistors and instrumentation amplifiers. Its 15 us conversion time is more than adequate for the 50-60 Hz bandwidth of process variables such as temperature, pressure, flow, and level. The on-chip buried-Zener reference and three-state bus simplify multi-channel PLCs and distributed control boards where many ADCs share one parallel bus; pin-strappable input ranges reduce stocking SKUs. Pin-compatible AD674B equivalents from Analog Devices also fit where the PCB was originally laid out for the Maxim pinout, allowing dual sourcing without redesign.
Được đề xuất
Medical Patient Monitoring Front-End
The MX674ALCWI+T suits medical patient-monitoring analog front-ends for ECG, SpO2, and respiratory sensors because the 12-bit resolution, 66 ksps throughput, and internal reference provide clean digitization of sub-mV to multi-V bioelectric signals after instrumentation-amp gain stages (e.g. AD620). Wide bipolar +/-10 V input range accommodates transducer conditioning and lead-fail detect biasing without external level shifting. The 28-SOIC wide-body package and three-state bus ease PCB debug and rework during regulatory pre-submission iterations, where a single ADC can be re-flashed or re-tested in minutes. Designers should add isolated grounds and a 50 Hz notch filter on the analog input to push common-mode noise below 12-bit LSB; the internal clock transitions can inject approximately 1 LSB of switching noise into the analog ground if not properly decoupled.
Được đề xuất
Precision Transducer Signal Conditioning
The MX674ALCWI+T converts conditioned strain-gauge, load-cell, and LVDT transducer outputs in industrial scales and force measurement systems because 12-bit dynamic range (4096 codes) over a 10 V span yields 2.44 mV per LSB. Adequate for the 1-2 mV/V sensitivity typical of strain gauges amplified by a 10-100x gain stage. The internal 10 V buried-Zener reference (5 ppm/1000 hr typical) provides the ratiometric excitation needed for true bridge balance tracking. Designers pair the MX674 with an instrumentation amplifier (MAX1947 / MAX4250) plus a low-drift Kelvin-sensed excitation regulator to hold total scale error under 0.05 %. The 28-SOIC footprint simplifies hand-rework during load-cell calibration cycles and field service.
Được đề xuất
Motor Control Current and Voltage Sensing
The MX674ALCWI+T digitizes inverter DC-link voltage and motor phase current in variable-frequency drives, robotics, and EV traction controllers because the +/-10 V bipolar input handles bi-directional current sense resistors in H-bridge drives without extra sign-bit logic. 12-bit resolution covers the 50-100 A phase currents typical of small industrial servo motors at the 1-2 mA/LSB precision required for closed-loop torque control. The 15 us conversion gives roughly 60 kHz current-loop sample rate, which is sufficient for sub-1 kHz torque bandwidth drives when combined with a 1-2 pole analog filter. Designers using the MX674 with space-vector modulators often add a 5 ms dead-time correction table in firmware to compensate for switching-edge sampling delay; pin-strapping the BIPOFF pin lets the same ADC service uni-directional DC-link voltage rails and bi-directional phase currents from one PCB layout.
Được đề xuất
Test and Measurement Instrumentation
The MX674ALCWI+T serves bench-top multimeters, oscilloscope front-ends, and isolated data loggers because the 12-bit resolution, on-chip reference, and tristate bus ease integration into modular instruments that must digitize a mix of +/-5 V and 0-10 V signals. The 15 us conversion along with the STS signal supports interrupt-driven acquisition from 8051/HC11 processors typical of legacy DMM firmware. Across programmable ranges, the pin-strappable input spans and shared 28-SOIC land pattern allow one PCB to populate as 2 V, 20 V, or 200 V ranges by changing sense resistors. Pin-compatible MAX174 drop-ins deliver 8 us conversion for faster transient capture requirements without PCB rework.
Được đề xuất
Audio Analyzer and Studio ADC Front-End
Although the MX674ALCWI+T is a 12-bit converter suitable for studio digital audio meters, vu-meter, and broadcast level-monitoring applications - especially for digital VU displays rather than full-bandwidth audio. The +/-10 V input range cleanly digitizes audio-tap return signals and balanced line-level outputs already scaled by op-amp buffers. The internal reference and three-state bus allow simple interfacing to DSP front-ends like the ADSP-21xx. Audio designers usually pair the MX674 with high-grade audio op-amps (MAX15046 / MAX4475) and dual-feed +/-12 V analog rails to keep total harmonic distortion below 0.005 %. For true 16-bit audio quality, upgrade to the MAX194ACPE/MAX195 part family.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho MX674ALCWI+T — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | MX674AJCWI | MX674AKEWI+T | MAX174ACWI | MX574ALEWI+T | AD674BBRZ |
|---|---|---|---|---|---|---|
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Analog Devices |
| Package | 28-SOIC (Wide) | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same | 28-SOIC - same |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Conversion Time | 15 us (max) | 15 us | 15 us | 8 us (faster ~47%) | 10 us (faster ~33%) | 15 us |
| Throughput (approx) | 66 ksps | 66 ksps | 66 ksps | 125 ksps | 100 ksps | 66 ksps |
| Internal Reference | Yes (+10V buried Zener) | Yes | Yes | Yes | Yes | Yes (+10V ref) |
| Temperature Grade | Commercial (0C to +70C) | Commercial | Commercial | Commercial | Extended grade | Industrial |
| Input Range | 0-10V, +/-5V, +/-10V | 0-10V, +/-5V, +/-10V | 0-10V, +/-5V, +/-10V | 0-10V, +/-5V, +/-10V | 0-10V, +/-5V, +/-10V | 0-10V, +/-5V, +/-10V |
Bảo phân biệt quan trọng
- Lowest cost commercially-graded variant in the family with internal reference (vsMX674AKEWI+T)
- Industry-standard 28-SOIC pinout shared with MAX174 and MX574A (vsMAX195BCWE)
- Cross-brand dual-source via AD674B pin-equivalent (vsAD674BBRZ)
Ghi chú thiết kế
Provide a low-impedance AGND plane and a separate DGND plane, joined at a single point near the ADC. Use wide 0.5 mm traces or polygons for Vcc (+15V analog), Vss (-15V analog), and Vdd (+5V digital). Add 10 uF + 0.1 uF ceramic bypass caps within 5 mm of each supply pin; the Vcc/Vss pair needs an extra 10 uF tantalum. Per the Maxim datasheet, the analog input (AIN) trace must be guarded by AGND to minimize injected clock noise.
Estimated: at 12-bit resolution across the +/-10V range, 1 LSB = 4.88 mV. If the application expects accuracy within 1 LSB, the input op-amp stage must have 1/f noise below ~50 nV/sqrt(Hz) and the reference bypass capacitor must be 10 uF minimum. A common pitfall is to leave the MODE pin floating - this changes the chip from uP mode (parallel-bus handshake) to stand-alone (free-running) and corrupts reads. Tie MODE to DGND via 100 kohm if using micro mode, or to Vdd for free-run.
Place the MX674ALCWI+T at least 25 mm away from switching regulators, gate drivers, and high-frequency data lines. The internal clock and successive-approximation logic can radiate 10-20 MHz noise into adjacent analog traces. For multi-channel boards using shared data bus, add a 74HC245 buffer near the ADC output and place 100 ohm source-termination resistors in series with DB0-DB11 to suppress reflections on long bus traces.
The three-state data bus (DB0-DB11) requires OE-controlled enable synchronization. Use a 74HC574 latch at the microprocessor to capture DB0-DB11 simultaneously, rather than relying on software polling of the STS pin alone. Without the latch, channel-to-channel skew can violate the 12-bit sampling window during burst reads. Read the STS line just before CE rise-edge for tightest hand-off.
Thông tin tuân thủ
RoHS, REACH, lead-free, and halogen-free status were not directly stated in the verified web data. 'C' grade denotes commercial 0C to +70C temperature range; it is not AEC-Q100 qualified. Confirm compliance with the manufacturer lot trace before committing to automotive or RoHS-restricted applications.
