PCA9535CD - 16-Bit I2C GPIO Expander | NXP Semiconductors
MPN: PCA9535CD ✓ Hoạt độngPCA9535CD Tóm tắt
An I/O expander is an interface IC that extends the number of general-purpose digital lines connected to a host controller. The PCA9535 and PCA9535C belong to this low-power CMOS I/O-expander family and were developed for I2C-bus and SMBus applications. Each port pin can operate as an input or output, allowing one serial bus to control multiple discrete signals while reducing the number of package pins required by the host microcontroller.
The PCA9535CD supports 16 GPIO lines, a 400 kHz I2C clock, a 2.3 V to 5.5 V operating supply range, and an interrupt mechanism for connected peripherals. Unlike devices fitted with internal I/O pull-up resistors, the PCA9535 omits those pull-ups, reducing power consumption when its output ports are held LOW. External pull-ups can still be added when the connected circuit requires them. Software configuration determines each port's input or output direction.
NXP documents the device as pin-to-pin and I2C-address compatible with the PCF8575, although enhancements require software changes described in Application Note AN469. The PCA9535 is also described as identical to the PCA9555 except for removal of the internal I/O pull-up resistor. These relationships make the PCA9535 useful when a design requires the enhanced interrupt behavior and port features of the PCA9535 while retaining compatibility with established software architectures.
Typical uses include expanding microcontroller GPIO for LEDs, push buttons, logic-level control signals, and peripheral interface signals. It can also serve industrial, embedded, and communications equipment where a serial-to-parallel expansion is preferable to adding another microcontroller or a larger host package. The interrupt output can provide an efficient way to notify the host of a change at a connected input rather than requiring continuous polling.
Designers should confirm the device's I2C address, address pins, interrupt configuration, and external pull-up requirements before finalizing a board. The bus must also remain within the specified 2.3 V to 5.5 V supply range and 400 kHz clock limit. Because the PCA9535 has no internal I/O pull-ups, input leakage, voltage thresholds, and external bus pull-ups must be evaluated together to ensure reliable logic levels.
This page combines the verified NXP product information with distributor availability and pricing, strict same-package alternatives, application guidance, and design considerations. The information is intended to help engineers determine compatibility, sourcing, and implementation requirements without treating electrically similar but mechanically different devices as drop-in replacements.
Bộ thay thế dễ dàng lắp đặt cho PCA9535CD — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PCA9535CD (cùng hình factor và footprint) — khác nhau ở Device Type, Package.
PCA9555PW
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PCF8575
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
PCA9535CD Thông số kỹ thuật
| Number of I/O Ports | 16 ports |
| Number of GPIO Pins | 16 pins |
| Loại giao diện | I2C-bus and SMBus |
| Maximum I2C Clock Frequency | 400 kHz |
| Điện áp cung cấp hoạt động | 2.3 V to 5.5 V |
| Device Type | CMOS I/O expander |
| Port Configuration | 16 configurable input or output pins |
| Interrupt Output | 1 active-low open-drain interrupt output |
| Internal I/O Pull-Up Resistors | Not fitted |
| Hộp | 24-pin SOIC, 7.50 mm body width |
| Kiểu lắp đặt | Surface mount |
| Packaging | Tape and reel |
| I2C Address Compatibility with PCF8575 | Compatible; software changes required |
| Pin Compatibility with PCF8575 | Pin-to-pin compatible |
| Relationship to PCA9555 | Identical except for removal of internal I/O pull-up resistors |
| Application Reference | NXP Application Note AN469 |
Hướng dẫn cấu hình chân PCA9535CD 24-pin soic, 7.50 mm body width
Cấu hình chân cho PCA9535CD (24-pin soic, 7.50 mm body width gói). Số thứ tự chân, chức năng và sơ đồ kết nối được xác định trong tài liệu thông số kỹ thuật của nhà sản xuất. Tham khảo nó để biết footprint và hướng dẫn hàn chính xác.
Không có dữ liệu chân cụ thể sẵn có cho PCA9535CD.
Tham khảo: tài liệu kỹ thuật cho cấu hình chân đầy đủ.
Ứng dụng tiêu biểu
PCA9535CD phù hợp cho 6 Áp dụngs: Embedded GPIO Expansion, Industrial Control Signal Conditioning, LED and Indicator Control, Communications Equipment Backplane Control, Instrumentation and Test Equipment, Low-Power Sensor and Peripheral Interface.
Embedded GPIO Expansion
The PCA9535CD fits embedded designs that need more digital lines than the host controller can expose directly. Its 16 GPIO pins can be configured individually as inputs or outputs through the I2C interface, allowing a microcontroller to supervise buttons, status indicators, or discrete peripheral controls without requiring a larger host package. The 2.3 V to 5.5 V operating range supports both 3.3 V and 5 V systems. Because the PCA9535 has no internal I/O pull-ups, the designer must verify external pull-up requirements and input leakage. According to the NXP product information, omitting the internal pull-ups reduces power consumption when ports are held LOW, making explicit input-bias analysis especially important.
Được đề xuất
Industrial Control Signal Conditioning
The PCA9535CD is useful in industrial control boards where a compact controller must collect digital field signals and operate discrete control outputs. Sixteen configurable ports provide a uniform interface to limit switches, status flags, and actuator-enable signals over I2C. Its interrupt output can reduce unnecessary bus polling when an attached circuit changes state. The 2.3 V to 5.5 V range supports common industrial logic rails, but cable-connected inputs still require careful grounding, isolation, surge protection, and logic-threshold review. Since the PCA9535 does not include internal I/O pull-ups, every input path should be assessed for leakage, biasing, open-circuit behavior, and noise immunity before production release.
Được đề xuất
LED and Indicator Control
The PCA9535CD can concentrate low-current LED and indicator drive beneath a serial-control architecture. Its 16 output ports reduce the number of direct host-controller connections needed for panel indicators, while the 400 kHz I2C interface provides sufficient control bandwidth for ordinary status updates. The absence of internal I/O pull-ups is advantageous when outputs are continuously held LOW because it reduces unnecessary current consumption. Engineers should still calculate worst-case current per port and total device dissipation, and ensure that the LED current does not exceed the output limits in the manufacturer datasheet. External current-limiting resistors and an appropriate supply arrangement are required.
Được đề xuất
Communications Equipment Backplane Control
The PCA9535CD suits communications equipment that distributes module-present, reset, fault, or enable signals over a shared I2C bus. Sixteen ports provide enough density for several control functions on one interface, and the interrupt line can alert the host when a monitored input changes. The device's 400 kHz bus limit and 2.3 V to 5.5 V supply range align with many embedded backplanes, although the designer should account for bus capacitance, pull-up selection, and cable length. NXP confirms I2C-address and pin compatibility with the PCF8575 but notes required software changes, making register-level validation essential when adapting existing communications firmware.
Được đề xuất
Instrumentation and Test Equipment
In instrumentation and test equipment, the PCA9535CD can add front-panel and fixture-control lines while preserving a compact controller footprint. The 16 GPIO ports can operate inputs or outputs under firmware control, making the device suitable for range selection, relay-control commands, and status capture. The 2.3 V to 5.5 V range allows operation across common laboratory logic systems, while the 400 kHz I2C interface is adequate for modest control traffic. Designers should avoid assuming the internal pull-ups of the closely related PCA9555 are present, and should account for leakage, switch bounce, isolation, and the response time required when changing measurement ranges.
Được đề xuất
Low-Power Sensor and Peripheral Interface
The PCA9535CD is appropriate for compact sensor hubs and peripheral boards where power consumption and connector count are constrained. Sixteen configurable lines can monitor sensor-ready signals or control low-power peripherals while the host communicates through I2C. NXP specifically identifies the removal of internal I/O pull-ups as reducing power consumption when I/O ports are held LOW, which is valuable in duty-cycled equipment. However, the same omission means that external biasing may be needed to establish valid logic levels. The designer should quantify leakage across connected sensors, examine idle current in the actual operating mode, and confirm that the interrupt path remains usable when the main host is in a low-power state.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PCA9535CD — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PCA9555 | PCF8575 |
|---|---|---|---|
| Package | 24-pin SOIC | 24-pin SOIC | 24-pin SOIC |
| Brand | NXP Semiconductors | NXP Semiconductors | Texas Instruments |
| Number of I/O Ports | 16 ports | 16 ports | 16 ports |
| Interface | I2C-bus and SMBus | I2C-bus and SMBus | I2C-bus and SMBus |
| PCF8575 Hardware Compatibility | Pin-to-pin and I2C-address compatible; software changes required | Not applicable | Reference device |
Bảo phân biệt quan trọng
- Lower potential standby consumption with outputs held LOW (vsPCA9555)
- Established hardware migration path (vsPCF8575)
- Complete 16-line parallel expansion (vsPCF8575)
Ghi chú thiết kế
Place the PCA9535CD close to the devices whose signals it supports and keep the I2C route away from noisy switching nodes. The verified data identifies a 24-pin SOIC package, so the footprint and pad geometry must match that package exactly. Confirm power, ground, address, interrupt, and all 16 I/O assignments against the exact datasheet pinout before releasing artwork.
The PCA9535 omits internal I/O pull-up resistors, so every external input and any I2C bus requiring pull-ups must be evaluated independently. Check leakage from connected devices, valid high-level voltage, and worst-case LOW-state current. Adding external pull-ups can increase system power, so select the largest resistance that still satisfies rise-time and sink-current requirements.
Do not treat the PCF8575 relationship as a firmware-identical substitution. NXP states that the PCA9535 is pin-to-pin and I2C-address compatible with the PCF8575, but software changes are required for the enhancements and are discussed in Application Note AN469. Review register behavior, interrupt handling, port defaults, and pull-up assumptions before replacing either device.
Keep the I2C bus at or below its verified 400 kHz maximum and account for bus capacitance when setting pull-up values. For long branches or slow edges, add a buffer such as the site-listed PCA9515AD only after confirming that the additional device's direction, address handling, and electrical characteristics support the topology. Stubs should be minimized to reduce reflections.
Thông tin tuân thủ
The supplied verified data does not explicitly state target-part compliance for RoHS, REACH, AEC-Q100, lead-free status, halogen-free status, or conflict minerals.
