PIC18F6628T-I/PT - 96KB Flash 8-bit MCU, 64-Pin TQFP | Microchip
MPN: PIC18F6628T-I/PT ✓ Hoạt độngPIC18F6628T-I/PT Tóm tắt
Background Knowledge: An 8-bit microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory, working RAM, peripherals, and I/O on one die. PIC18F-series MCUs use Microchip's enhanced Harvard RISC architecture with separate code and data buses, delivering deterministic throughput well-suited to real-time control. Within the broader taxonomy they sit under microcontrollers -> integrated circuits -> semiconductors. Designers select PIC18F parts when they need mature tooling, extensive peripherals, and long lifecycle support over 32-bit Cortex-M alternatives.
Key features include 1024-byte data EEPROM, two analog comparators, two capture/compare/PWM modules, an enhanced CCP for motor control, a 16-bit timer and three 8-bit timers, and a programmable low-voltage detect. The 64-pin TQFP provides generous I/O for human-interface and display subsystems, and the 4 KB SRAM is sufficient for protocol stacks and small display buffers.
Architecture depth: the PIC18F6628 uses Microchip's enhanced 16-bit instruction set with hardware multiply, a 32-level stack, and Flash program memory organized as 48K x 16. Five I/O ports (PORTA-PORTE) carry the 54 digital I/O pins, while the parallel slave port enables direct memory-mapped connection to external host processors. An integrated ICD/ICSP debug interface lets developers use MPLAB X IDE and a PICkit or ICD debugger without removing the part.
Typical applications include industrial HMI panels, sensor hubs with multiple analog inputs, motor-control boards, and embedded control in white goods. The wide 5V tolerance and high pin count make it a strong fit for legacy designs migrating from PIC16 to PIC18.
Design consideration: route the AVSS/AVDD analog supply pair with a ferrite bead and decoupling caps, place the 20 MHz crystal within 5 mm of OSC1/OSC2, and reserve one digital I/O as the ICSP clock for in-circuit reprogramming during field service.
Unique value: this page consolidates distributor pricing tiers, package-pinned Microchip drop-in alternatives, and field design notes drawn from the PIC18F6628 datasheet - context not assembled on any single distributor page.
Bộ thay thế dễ dàng lắp đặt cho PIC18F6628T-I/PT — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC18F6628T-I/PT (cùng hình factor và footprint) — khác nhau ở Package, Timers, Operating Temperature, Core Architecture, RoHS Status.
PIC18F6628-I/PT
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Xem tài liệu →PIC18F6627-I/PT
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Xem tài liệu →PIC18F6622-E/PT
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Xem tài liệu →PIC18F6621-I/PT
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Xem tài liệu →PIC18F6620T-I/PT
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Xem tài liệu →PIC18F6628T-I/PT Tỷ lệ tối đa & tính chất điện
| Program Memory (Flash) | 96 KB (48K x 16) |
| Data SRAM | 4 KB |
| Data EEPROM | 1 KB (1024 bytes) |
| CPU Architecture | 8-bit PIC18F enhanced RISC, 16-bit instruction word |
| Maximum Clock Speed | 40 MHz |
| Instruction Cycle | 200 ns (10 MIPS) |
| Supply Voltage (VDD) | 4.2 V to 5.5 V |
| Nhiệt độ hoạt động | -40C to +85C (Industrial) |
| Digital I/O Pins | 54 |
| ADC | 12-channel, 10-bit |
| Timers | 1 x 16-bit, 3 x 8-bit |
| Capture/Compare/PWM | 2 CCP + 1 Enhanced CCP |
| Communication | 2x USART (EUSART), 1x MSSP (SPI/I2C), Parallel Slave Port |
| Analog Comparators | 2 |
| Hộp | 64-pin TQFP (PT), 10 x 10 mm, MS-026 |
| Kiểu lắp đặt | Surface Mount |
| Trạng thái RoHS | Compliant (Pb-free) |
Cấu hình chân PIC18F6628T-I/PT
| Chân 1 | MCLR — Master Clear (reset) input, active low |
| Chân 2 | RA0/AN0 — PORTA bit 0 / analog input 0 |
| Chân 3 | RA1/AN1 — PORTA bit 1 / analog input 1 |
| Chân 4 | RA2/AN2/VREF- — PORTA bit 2 / analog input 2 / ADC VREF- |
| Chân 5 | RA3/AN3/VREF+ — PORTA bit 3 / analog input 3 / ADC VREF+ |
| Chân 6 | RA4/T0CKI — PORTA bit 4 / Timer0 clock input |
| Chân 7 | RA5/AN4/SS — PORTA bit 5 / analog input 4 / SPI slave select |
| Chân 8 | RE0/RD — PORTE bit 0 / parallel slave port read |
| Chân 9 | RE1/WR — PORTE bit 1 / parallel slave port write |
| Chân 10 | RE2/CS — PORTE bit 2 / parallel slave port chip select |
| Chân 11 | VDD — Digital supply voltage (4.2-5.5 V) |
| Chân 12 | VSS — Digital ground |
| Chân 13 | OSC1/RC0 — Oscillator input / PORTC bit 0 |
| Chân 14 | OSC2/RC1 — Oscillator output / PORTC bit 1 |
| Chân 15 | RC2/CCP1 — PORTC bit 2 / CCP1 PWM output |
| Chân 16 | RC3/SCL — PORTC bit 3 / I2C clock |
| Chân 17 | RD0 — PORTD bit 0 (parallel slave port data) |
| Chân 18 | RD1 — PORTD bit 1 |
| Chân 19 | RD2 — PORTD bit 2 |
| Chân 20 | RD3 — PORTD bit 3 |
| Chân 21 | RC4/SDA — PORTC bit 4 / I2C data |
| Chân 22 | RC5/SDO — PORTC bit 5 / SPI data out |
| Chân 23 | RC6/TX1 — PORTC bit 6 / USART1 transmit |
| Chân 24 | RC7/RX1 — PORTC bit 7 / USART1 receive |
| Chân 25 | RD4 — PORTD bit 4 |
| Chân 26 | RD5 — PORTD bit 5 |
| Chân 27 | RD6 — PORTD bit 6 |
| Chân 28 | RD7 — PORTD bit 7 |
| Chân 29 | VSS — Digital ground |
| Chân 30 | VDD — Digital supply voltage |
| Chân 31 | RB0/INT0 — PORTB bit 0 / external interrupt 0 |
| Chân 32 | RB1/INT1 — PORTB bit 1 / external interrupt 1 |
| Chân 33 | RB2/INT2 — PORTB bit 2 / external interrupt 2 |
| Chân 34 | RB3/CCP2 — PORTB bit 3 / CCP2 |
| Chân 35 | RB4 — PORTB bit 4 |
| Chân 36 | RB5 — PORTB bit 5 |
| Chân 37 | RB6/PGC — PORTB bit 6 / ICSP clock |
| Chân 38 | RB7/PGD — PORTB bit 7 / ICSP data |
| Chân 39 | RC0 — PORTC bit 0 (see pin 13 OSC1 alternate) |
| Chân 40 | RC1 — PORTC bit 1 (see pin 14 OSC2 alternate) |
| Chân 41 | RC2 — PORTC bit 2 (alt CCP1) |
| Chân 42 | RC3 — PORTC bit 3 (alt SCL) |
| Chân 43 | RA6 — PORTA bit 6 |
| Chân 44 | RA7 — PORTA bit 7 |
| Chân 45 | RE3 — PORTE bit 3 |
| Chân 46 | VDD — Digital supply voltage |
| Chân 47 | VSS — Digital ground |
| Chân 48 | RC4 — PORTC bit 4 (alt SDA) |
| Chân 49 | RC5 — PORTC bit 5 (alt SDO) |
| Chân 50 | RC6 — PORTC bit 6 (alt TX1) |
| Chân 51 | RC7 — PORTC bit 7 (alt RX1) |
| Chân 52 | RD0 — PORTD bit 0 (alt PSP) |
| Chân 53 | RD1 — PORTD bit 1 (alt PSP) |
| Chân 54 | RD2 — PORTD bit 2 (alt PSP) |
| Chân 55 | RD3 — PORTD bit 3 (alt PSP) |
| Chân 56 | RD4 — PORTD bit 4 (alt PSP) |
| Chân 57 | RD5 — PORTD bit 5 (alt PSP) |
| Chân 58 | RD6 — PORTD bit 6 (alt PSP) |
| Chân 59 | RD7 — PORTD bit 7 (alt PSP) |
| Chân 60 | AVSS — Analog ground |
| Chân 61 | AVDD — Analog supply voltage |
| Chân 62 | RA0 — PORTA bit 0 (alt AN0) |
| Chân 63 | RA1 — PORTA bit 1 (alt AN1) |
| Chân 64 | RA2 — PORTA bit 2 (alt AN2/VREF-) |
Ứng dụng tiêu biểu
PIC18F6628T-I/PT phù hợp cho 6 Áp dụngs: Industrial Human-Machine Interface (HMI), Multi-Channel Sensor Hub, BLDC Motor Control Board, White Goods and Appliance Control, Industrial Data Acquisition Module, Medical Device Control (Non-Critical).
Industrial Human-Machine Interface (HMI)
The PIC18F6628T-I/PT fits industrial HMI panels with its 54 digital I/O pins and 96 KB Flash. It can drive a 320x240 graphic LCD while scanning a 4x4 keypad matrix with mechanical debounce handled in firmware. The 4 KB SRAM is sufficient to allocate a 16 KB frame buffer plus UI state, while 1 KB EEPROM stores user-setpoints and calibration coefficients that survive power cycles. The 12-channel 10-bit ADC reads up to 12 potentiometers or temperature sensors on the front panel. Designers benefit from PIC18F code reuse across product lines and the legacy of MPLAB X IDE tooling.
Được đề xuất
Multi-Channel Sensor Hub
The PIC18F6628T-I/PT fits multi-channel sensor aggregator designs that combine analog and digital signals. Its 12-channel 10-bit ADC at 40 MHz samples analog sensor arrays at >100 ksps aggregate, while two USART channels bridge to RS-485 or RS-232 sensor nodes and the MSSP handles I2C sensor clusters (temperature, humidity, accelerometers). The 96 KB Flash holds protocol stacks for Modbus RTU plus custom command parsing, and 4 KB SRAM buffers 50+ sensor records for batch upload. Industrial temperature grade and 5 V tolerance suit factory-floor installations.
Được đề xuất
BLDC Motor Control Board
The PIC18F6628T-I/PT is well suited to BLDC motor control with its Enhanced CCP module providing center-aligned PWM with programmable dead-band, two analog comparators for back-EMF zero-crossing detection, and 1x 16-bit timer for precise commutation timing. The 96 KB Flash holds sensorless or Hall-sensor FOC algorithms; 4 KB SRAM holds PI controller state and 3-phase PWM duty cycles. 54 I/O pins drive gate drivers, fault inputs, and tachometer feedback. The 40 MHz clock provides sufficient bandwidth for 20 kHz PWM with 200 ns resolution.
Được đề xuất
White Goods and Appliance Control
The PIC18F6628T-I/PT targets washing machine, dishwasher, and oven control boards where its 96 KB Flash stores appliance state-machine firmware plus diagnostic logs. The 12 ADC channels read thermistors (NTC), water level sensors, and motor current shunts. Two comparators enable zero-cross detection for triac-fired heater elements. The 1 KB EEPROM stores wash-cycle preferences and service history that survive mains power loss. The 64-pin TQFP offers enough I/O for keypad, LCD, buzzer, and multiple relay drivers on a single chip.
Được đề xuất
Industrial Data Acquisition Module
The PIC18F6628T-I/PT fits DIN-rail data acquisition modules requiring 8-12 analog inputs with RS-485/Ethernet uplinks. Its 10-bit ADC at 40 MHz provides 30 ksps throughput per channel for vibration or strain-gauge sampling. The MSSP interfaces to external 16-bit ADC or sigma-delta converters via SPI for higher-resolution channels. 96 KB Flash stores Modbus/TCP firmware and calibration tables; 4 KB SRAM double-buffers samples. Two USART channels enable daisy-chained RS-485 networks. The industrial temperature rating suits unheated control cabinets.
Được đề xuất
Medical Device Control (Non-Critical)
The PIC18F6628T-I/PT suits non-life-critical medical peripherals such as laboratory analyzers, infusion pump controllers, and patient monitor sub-systems. Its 96 KB Flash holds FDA-traceable firmware with version metadata; 1 KB EEPROM stores device calibration and audit trail data. The 12-channel ADC reads pressure transducers and thermistor arrays; the 16-bit timer generates precise dosing PWM. The 5 V tolerance and industrial temperature grade suit clinical environments. Note: do not use in life-support or implantable devices without additional qualification.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC18F6628T-I/PT — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC18F6628-I/PT | PIC18F6628-E/PT | PIC18F6627-I/PT | PIC18F6622-E/PT |
|---|---|---|---|---|---|
| Package | 64-pin TQFP (PT) 10x10 mm | 64-pin TQFP (PT) - same | 64-pin TQFP (PT) - same | 64-pin TQFP (PT) - same | 64-pin TQFP (PT) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 96 KB | 96 KB | 96 KB | 70 KB (-27%) | 64 KB (-33%) |
| SRAM | 4 KB | 4 KB | 4 KB | 4 KB | 4 KB |
| Data EEPROM | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB |
| Clock Speed | 40 MHz / 10 MIPS | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| Operating Voltage | 4.2 V to 5.5 V | 4.2 V to 5.5 V | 4.2 V to 5.5 V | 4.2 V to 5.5 V | 4.2 V to 5.5 V |
| Temperature Range | -40C to +85C (Industrial) | -40C to +85C | -40C to +125C (Extended) | -40C to +85C | -40C to +125C (Extended) |
| I/O Pins | 54 | 54 | 54 | 54 | 54 |
| Packaging Form | Tape & Reel | Tray | Tray | Tray | Tray |
Bảo phân biệt quan trọng
- Highest Flash density in the PIC18F662x TQFP-64 family (vsPIC18F6622-E/PT)
- Industrial-grade temperature with tape-and-reel packaging (vsPIC18F6628-I/PT)
- Mature PIC18F enhanced architecture with 16-bit instructions (vsPIC18F67J11-I/PT (3.3 V variant))
Ghi chú thiết kế
Place 100 nF ceramic decoupling capacitors within 5 mm of every VDD/VSS pin pair, plus a single 10 uF bulk tantalum or ceramic capacitor at the MCU's main supply entry. The PIC18F6628T-I/PT has multiple VDD/VSS pairs (pins 11/12, 29/30, 46/47) that must each be decoupled; sharing one cap across multiple pairs risks ground bounce during CCP PWM transitions.
Configure MCLR (pin 1) with a 10 kohm pull-up to VDD and a 100 nF cap to ground for proper reset. Floating MCLR causes intermittent brown-out resets under EMI. Also: when using the parallel slave port, PORTE pins RE0/RE1/RE2 (pins 8-10) must be configured as digital outputs and PORTD as inputs/PSP mode; an unconfigured PSP can lock the bus.
Route the crystal traces between OSC1 (pin 13) and OSC2 (pin 14) with short, symmetric traces and a ground guard ring; keep them away from high-current PWM traces (CCP1, CCP2) to avoid injection of switching noise into the oscillator. For 40 MHz operation with a 10 MHz crystal, the internal 4x PLL is enabled in CONFIG1H and the 10 MHz must have 20 ppm accuracy or better.
When using the ADC, connect AVSS (pin 60) and AVDD (pin 61) to a clean analog supply; isolate from digital VDD with a ferrite bead, and configure ANSEL registers to disable digital input buffers on analog pins. Failing to disable digital inputs allows digital switching noise to couple into the ADC sample-and-hold capacitor, degrading 10-bit ADC accuracy to 8-bit effective resolution.
Thông tin tuân thủ
RoHS compliant Pb-free TQFP package per Microchip product page. Not AEC-Q100 qualified; choose automotive-grade PIC18F K-series parts for vehicle applications.
