PIC18LF66K80T-I/PT - 64KB Flash, 64MHz 8-bit MCU | Microchip
MPN: PIC18LF66K80T-I/PT ✓ Hoạt độngPIC18LF66K80T-I/PT Tóm tắt
An 8-bit PIC microcontroller is a Harvard-architecture RISC device with separate program and data buses, optimized for deterministic interrupt response and low-power operation. It belongs to the broader category of microcontrollers -> microcontrollers (MCU) -> integrated circuits, and is part of the Microchip PIC18F "K80" family which adds an automotive-grade CAN peripheral to the standard PIC18 instruction set. This places the part in a hierarchy of MCU -> 8-bit MCU -> PIC18 -> PIC18F66K80 family.
Key features of the PIC18LF66K80T-I/PT include nanoWatt XLP sleep currents as low as sub-1µA in deep sleep, 64KB self-programmable Flash with 1KB EEPROM, 4KB SRAM, two Enhanced USART modules, two MSSP (SPI/I2C) peripherals, an Enhanced CAN 2.0B module, an 8-channel 12-bit ADC, CTMU for capacitive touch or precise time measurement, and a 16-bit timer/counter. The 64-pin TQFP provides up to 53 digital I/O pins, suiting complex peripheral-rich designs.
The architecture combines a RISC core with C-compiler-friendly instructions, dual-bus Harvard memory, and configurable peripherals routed through Peripheral Pin Select (PPS), simplifying PCB layout. The integrated ECAN 2.0B controller offloads CAN protocol handling from the CPU, enabling deterministic real-time automotive and industrial networking. The CTMU adds hardware-timed current sources for cap-touch, IR remote decoding, or temperature compensation without external analog circuitry.
Typical applications include automotive body and comfort networks (CAN nodes, BCM), industrial CAN-bus sensor hubs, low-power battery telemetry devices, HVAC controller boards, and ECAN-controlled lighting controllers. The wide voltage range and nanoWatt XLP sleep currents also suit handheld instrumentation where standby life on a single CR2032 cell is critical.
When designing with this MCU, plan I/O and PPS assignments before PCB layout because PPS mappings are not reversible on hardware. Decouple VDD/VSS pairs with at least 100nF ceramic capacitors close to each pin pair, and place the ECAN bus transceiver's split termination within 10mm of the bus pins to meet CAN signal-integrity requirements.
Bộ thay thế dễ dàng lắp đặt cho PIC18LF66K80T-I/PT — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC18LF66K80T-I/PT (cùng hình factor và footprint) — khác nhau ở Package, ADC, Communication Peripherals, Mounting Type, Data EEPROM.
PIC18LF46K80T-I/PT
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PIC18LF47K40T-I/PT
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Xem tài liệu →PIC18LF66K80T-I/PT Tỷ lệ tối đa & tính chất điện
| Core | PIC18 8-bit RISC, Harvard architecture |
| Program Memory (Flash) | 64 KB (32K x 16) |
| Data EEPROM | 1 KB |
| SRAM | 4 KB |
| Maximum CPU Speed | 64 MHz (16 MIPS) |
| Supply Voltage (VDD) | 1.8 V to 5.5 V |
| Nhiệt độ hoạt động | -40 C to +85 C (Industrial, 'I') |
| Hộp | 64-pin TQFP (PT), 10 x 10 x 1 mm |
| Kiểu lắp đặt | Surface Mount, Tape & Reel ('T') |
| I/O Pins | Up to 53 (multi-tasked) |
| ADC | 12-bit, 8 channels |
| CAN Module | ECAN 2.0B active |
| Communication Peripherals | 2x EUSART, 2x MSSP (SPI/I2C) |
| Timers | 16-bit and 8-bit, plus CTMU |
| Low-Power Technology | nanoWatt XLP |
| Trạng thái RoHS | Compliant |
Cấu hình chân PIC18LF66K80T-I/PT
| Chân 1 | RC0 — Digital I/O / PWM1 / T3CKI |
| Chân 2 | RC1 — Digital I/O / CCP2 / T2CKI |
| Chân 3 | RC2 — Digital I/O / AN14 / CTMUI |
| Chân 4 | RC3 — Digital I/O / SCL1 / AN15 |
| Chân 5 | RC4 — Digital I/O / SDA1 |
| Chân 6 | RC5 — Digital I/O / SDO1 |
| Chân 7 | RC6 — Digital I/O / TX1 |
| Chân 8 | RC7 — Digital I/O / RX1 |
| Chân 9 | RE0 — Digital I/O / AN5 |
| Chân 10 | RE1 — Digital I/O / AN6 |
| Chân 11 | RE2 — Digital I/O / AN7 |
| Chân 12 | RE3 — Digital I/O |
| Chân 13 | AVDD — Analog supply |
| Chân 14 | AVSS — Analog ground |
| Chân 15 | RA0 — Digital I/O / AN0 / ULPWU |
| Chân 16 | RA1 — Digital I/O / AN1 |
| Chân 17 | RA2 — Digital I/O / AN2 / VREF- |
| Chân 18 | RA3 — Digital I/O / AN3 / VREF+ |
| Chân 19 | RA4 — Digital I/O / T0CKI |
| Chân 20 | RA5 — Digital I/O / AN4 / SS1 |
| Chân 21 | VDD — Digital supply (1.8-5.5 V) |
| Chân 22 | VSS — Digital ground |
| Chân 23 | RA6 — Digital I/O / OSC2 |
| Chân 24 | RA7 — Digital I/O / OSC1 / CLKI |
| Chân 25 | RB0 — Digital I/O / INT0 / FLT0 |
| Chân 26 | RB1 — Digital I/O / INT1 |
| Chân 27 | RB2 — Digital I/O / INT2 / CANRX |
| Chân 28 | RB3 — Digital I/O / INT3 / CANTX |
| Chân 29 | RB4 — Digital I/O / KBI0 |
| Chân 30 | RB5 — Digital I/O / KBI1 / PGM |
| Chân 31 | RB6 — Digital I/O / KBI2 / PGC (ICSP clock) |
| Chân 32 | RB7 — Digital I/O / KBI3 / PGD (ICSP data) |
| Chân 33 | VDD — Digital supply |
| Chân 34 | VSS — Digital ground |
| Chân 35 | RD0 — Digital I/O / PSP0 |
| Chân 36 | RD1 — Digital I/O / PSP1 |
| Chân 37 | RD2 — Digital I/O / PSP2 |
| Chân 38 | RD3 — Digital I/O / PSP3 |
| Chân 39 | RD4 — Digital I/O / PSP4 / SDO2 |
| Chân 40 | RD5 — Digital I/O / PSP5 / SDI2 |
| Chân 41 | RD6 — Digital I/O / PSP6 / SCK2 |
| Chân 42 | RD7 — Digital I/O / PSP7 / SS2 |
| Chân 43 | VDDCORE — Internal core regulator output (10 µF cap) |
| Chân 44 | RF0 — Digital I/O / AN16 |
| Chân 45 | RF1 — Digital I/O / AN17 |
| Chân 46 | RF2 — Digital I/O / AN18 |
| Chân 47 | RF3 — Digital I/O / AN19 |
| Chân 48 | RF4 — Digital I/O / AN20 |
| Chân 49 | RF5 — Digital I/O / AN21 / C2OUT |
| Chân 50 | RF6 — Digital I/O / AN22 / C1OUT |
| Chân 51 | RF7 — Digital I/O / AN23 / SS3 |
| Chân 52 | RG0 — Digital I/O / CCP3 |
| Chân 53 | RG1 — Digital I/O / TX2 / CK2 |
| Chân 54 | RG2 — Digital I/O / RX2 / DT2 |
| Chân 55 | RG3 — Digital I/O / CCP4 |
| Chân 56 | RG4 — Digital I/O / CCP5 / T7CKI |
| Chân 57 | VDD — Digital supply |
| Chân 58 | VSS — Digital ground |
| Chân 59 | RH0 — Digital I/O / AN23 alt |
| Chân 60 | RH1 — Digital I/O |
| Chân 61 | RH2 — Digital I/O |
| Chân 62 | RH3 — Digital I/O |
| Chân 63 | MCLR — Master clear (reset, active low) |
| Chân 64 | NC — Not connected (per datasheet) |
Ứng dụng tiêu biểu
PIC18LF66K80T-I/PT phù hợp cho 6 Áp dụngs: Automotive CAN Body Control Nodes, Industrial CAN-Bus Sensor Hubs, Low-Power Battery Telemetry Devices, HVAC Climate Control Boards, ECAN-Controlled Lighting Controllers, Handheld Diagnostic Instruments.
Automotive CAN Body Control Nodes
The PIC18LF66K80T-I/PT is well suited for non-safety automotive body and comfort networks such as window lifters, mirror controllers, ambient lighting and seat modules. Its integrated ECAN 2.0B controller offloads CAN protocol filtering from the CPU, while the 64 MHz / 16 MIPS core easily handles the 500 kbps class-C CAN traffic typical of body networks. The 1.8 V to 5.5 V VDD range accommodates both 12 V-derived 5 V rails and 3.3 V sensor nodes, and the nanoWatt XLP sleep currents below 1 µA keep quiescent draw under 100 µA on parked vehicles.
Được đề xuất
Industrial CAN-Bus Sensor Hubs
For industrial sensor concentrators on CANopen or DeviceNet segments, the PIC18LF66K80T-I/PT combines the ECAN 2.0B controller with a 12-bit ADC and the CTMU for precise time-of-flight measurements. The 4 KB SRAM is sufficient for CANopen SDO buffering and cyclic PDO handling on a 1 Mbps bus, and the wide 1.8-5.5 V supply tolerates long industrial cables with significant ground-bounce. The 64-pin TQFP exposes up to 53 I/O, leaving headroom for digital sensors, keypad inputs and isolated UART pass-through to upstream PLCs.
Được đề xuất
Low-Power Battery Telemetry Devices
The PIC18LF66K80T-I/PT's nanoWatt XLP technology delivers sub-1 µA deep-sleep currents while RAM retention preserves context across wake events, ideal for battery telemetry sensors on a single CR2032 coin cell. The 64 KB Flash stores 30+ days of timestamped telemetry at 1 sample/minute, and the 12-bit ADC with CTMU drives battery voltage and temperature monitoring with no external analog ICs. The 1.8 V minimum VDD extends usable runtime below 2.0 V coin-cell cut-off, squeezing out an extra 20% of usable capacity compared to non-LF parts.
Được đề xuất
HVAC Climate Control Boards
In residential and light-commercial HVAC wall thermostats, the PIC18LF66K80T-I/PT drives the user interface (LCD + capacitive touch via CTMU), reads thermistor inputs through the 12-bit ADC, and communicates with indoor and outdoor units via ECAN or RS-485 through the EUSART. The 16 MIPS core easily runs proportional-integral control loops at 100 Hz with margin for UI graphics. Its wide 1.8-5.5 V supply accepts 24 VAC-derived 5 V rails directly without extra regulation.
Được đề xuất
ECAN-Controlled Lighting Controllers
Architectural and stage lighting controllers networked over CAN benefit from the PIC18LF66K80T-I/PT's ECAN 2.0B module and PWM-driven LED dimming. The 16-bit timers plus PWM mode generate up to 4 independent 16-bit PWM channels for flicker-free dimming down to 0.1% duty cycle, while 4 KB SRAM buffers DMX-over-CAN cue lists. The PPS-remappable EUSART also allows a parallel RS-485 DMX passthrough for hybrid DMX/CAN fixtures.
Được đề xuất
Handheld Diagnostic Instruments
Portable service tools and CAN bus analyzers benefit from the PIC18LF66K80T-I/PT's combination of ECAN 2.0B, USB-via-UART bridges, and sub-1 µA sleep for handheld battery life. The 64 KB Flash stores CANopen EDS profiles and OEM fault-code libraries, while the CTMU drives touch-button input on ruggedized keypads. The 1.8-5.5 V supply accepts single-cell Li-ion (4.2 V to 3.0 V) directly, eliminating boost regulators in slim-form-factor designs.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC18LF66K80T-I/PT — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC18LF46K80T-I/PT | PIC18F66K80T-I/PT | PIC18LF66K80-I/PT | PIC18LF47K40T-I/PT |
|---|---|---|---|---|---|
| Package | TQFP-64 (PT) 10x10 mm | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 64 KB | 32 KB (-50%) | 64 KB (same) | 64 KB (same) | 128 KB (+100%) |
| SRAM | 4 KB | 4 KB (same) | 4 KB (same) | 4 KB (same) | 8 KB (+100%) |
| Min VDD | 1.8 V | 1.8 V (same) | 2.0 V (+11% floor) | 1.8 V (same) | 1.8 V (same) |
| CAN Module | ECAN 2.0B active | ECAN 2.0B active (same) | ECAN 2.0B active (same) | ECAN 2.0B active (same) | No CAN (K40 family) |
| Max CPU Speed | 64 MHz (16 MIPS) | 64 MHz (same) | 64 MHz (same) | 64 MHz (same) | 64 MHz (same) |
| Packaging | Tape & Reel | Tape & Reel | Tape & Reel | Tray | Tape & Reel |
| Operating Temp | -40 to +85 C | -40 to +85 C (same) | -40 to +85 C (same) | -40 to +85 C (same) | -40 to +85 C (same) |
Bảo phân biệt quan trọng
- Integrated ECAN 2.0B with deeper acceptance-filter FIFO than competing 8-bit MCUs (vsPIC18LF47K40T-I/PT)
- Lowest VDD in 64-pin K80 family at 1.8 V vs 2.0 V competitors (vsPIC18F66K80T-I/PT)
- Larger Flash (64 KB) than the pin-compatible 32 KB K80 variant (vsPIC18LF46K80T-I/PT)
Ghi chú thiết kế
Place a 100 nF ceramic decoupling capacitor within 5 mm of every VDD/VSS pin pair on the PIC18LF66K80T-I/PT. The TQFP-64 has four VDD/VSS pairs, plus a separate AVDD/AVSS for the ADC; each analog pair must have its own 100 nF + 10 µF bulk capacitor. The VDDCORE pin (43) requires a 10 µF low-ESR ceramic to ground; failure to provide this decoupling will cause erratic ECAN communication and ADC drift. Estimated: at 64 MHz the part draws ~15 mA typical and ~30 mA peak, so a 100 mA LDO budget is adequate.
Route the ECAN CANTX/CANRX pair (RB3/RB2) as a short differential-style 100 Ω-impedance trace to the MCP2551 or TJA1050 transceiver, with the transceiver's CANH/CANL bus pins routed through a split 60 Ω (30 Ω + 30 Ω + 4.7 nF) termination as per CAN bus standards. Keep the transceiver within 10 mm of the MCU and isolate the bus from switching converters by at least 20 mm. The ECAN bit-timing register values must be recalculated when changing FOSC from 64 MHz to a different oscillator; Microchip application note AN1079 provides a spreadsheet calculator for this.
The ICSP pins PGD (RB7) and PGC (RB6) double as KBI3/KBI2 and may be repurposed in firmware via PPS; if your firmware reassigns these pins the in-circuit debugger will lose contact. Always reserve PGD/PGC in their default pin positions for programming and only move them with PPS on a design that exposes both default and remapped functions. The MCLR pin (64) cannot be disabled by software but can be configured as an input-only GPIO on K80-family parts; do not leave MCLR floating - tie it to VDD through a 10 kΩ pull-up for normal operation.
Thông tin tuân thủ
RoHS and REACH compliant per Microchip product page; the 'I' grade (-40 to +85 C) is industrial, not AEC-Q100 qualified - choose PIC18F66K80-E/PT variants for automotive.
