PIC32MX130F256D-50I/PT - 50MHz 32-bit MCU, 256KB Flash | Microchip
MPN: PIC32MX130F256D-50I/PT ✓ Hoạt độngPIC32MX130F256D-50I/PT Tóm tắt
A 32-bit microcontroller (MCU) is a single-chip computer that integrates a 32-bit CPU core, program memory (Flash), data memory (SRAM), and a configurable set of peripherals. The PIC32MX130F256D sits in the PIC32MX1xx sub-family, which itself is part of Microchip's broader PIC32 ecosystem. Architecturally, it falls under: 32-bit MCU -> RISC microcontroller -> embedded processor -> semiconductor. The M4K core executes the MIPS32 instruction set with 5-stage pipeline, giving 1.56 DMIPS/MHz - competitive with Cortex-M3 in its class.
Key features include two I2S/SPI modules for codec and audio connectivity, a Parallel Master Port (PMP) for graphics and external memory interfaces, mTouch capacitive touch support with 1 ns high-resolution time measurement, an on-chip temperature sensor, and a 10-bit ADC with up to 1 Msps conversion rate. Peripheral Pin Select (PPS) allows most digital peripherals to be remapped to a wide choice of pins, simplifying PCB routing.
Typical applications include consumer audio accessories, low-cost graphics HMIs using PMP-driven LCDs, capacitive touch user interfaces (buttons, sliders, proximity), USB-device bridge firmware, and general-purpose industrial control nodes. The combination of 16 KB SRAM and 256 KB Flash gives headroom for protocol stacks such as USB device, TCP/IP via a MAC add-on, or audio processing.
When designing with this MCU, note the 2.5 V-3.6 V supply range: a 3.3 V LDO is the typical choice. The 50 MHz maximum is only reached when the internal PLL is configured; the default FRC oscillator starts at 8 MHz. PPS reassignment must be committed before peripheral enable to avoid glitches.
Bộ thay thế dễ dàng lắp đặt cho PIC32MX130F256D-50I/PT — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC32MX130F256D-50I/PT (cùng hình factor và footprint) — khác nhau ở ADC, Timers, Package, Operating Temperature, Core Architecture.
PIC32MX130F256D-I/PT
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PIC32MX130F256D-50I/PT Tỷ lệ tối đa & tính chất điện
| Core Architecture | MIPS32 M4K 32-bit RISC |
| Maximum CPU Frequency | 50 MHz |
| Performance | 83 DMIPS |
| Program Flash Memory | 256 KB |
| Data SRAM | 16 KB |
| Operating Voltage Range | 2.5 V to 3.6 V |
| ADC | 10-bit, up to 1 Msps |
| I2S / SPI Modules | 2 |
| I2C Modules | 2 |
| UART Modules | 2 |
| Parallel Master Port (PMP) | Yes |
| Peripheral Pin Select (PPS) | Yes |
| mTouch Capacitive Touch | Supported |
| On-chip Temperature Sensor | Yes |
| Nhiệt độ hoạt động | -40C to +85C (Industrial) |
| Hộp | 44-pin TQFP (10x10 mm) |
| Kiểu lắp đặt | Surface Mount |
| Trạng thái RoHS | Compliant |
Cấu hình chân PIC32MX130F256D-50I/PT
| Chân 1 | RPB0/AN0 — Remappable I/O, analog input 0 |
| Chân 2 | RPB1/AN1 — Remappable I/O, analog input 1 |
| Chân 3 | RPB2/AN2 — Remappable I/O, analog input 2 |
| Chân 4 | RPB3/AN3 — Remappable I/O, analog input 3 |
| Chân 5 | VSS — Ground reference |
| Chân 6 | RA0 — Port A bit 0 |
| Chân 7 | RA1 — Port A bit 1 |
| Chân 8 | RA2 — Port A bit 2 |
| Chân 9 | RA3 — Port A bit 3 |
| Chân 10 | RA4 — Port A bit 4 |
| Chân 11 | RA5 — Port A bit 5 |
| Chân 12 | RA6 — Port A bit 6 |
| Chân 13 | RA7 — Port A bit 7 |
| Chân 14 | VSS — Ground reference |
| Chân 15 | VDD — Positive supply (2.5 V to 3.6 V) |
| Chân 16 | RA8 — Port A bit 8 |
| Chân 17 | RA9 — Port A bit 9 |
| Chân 18 | RA10 — Port A bit 10 |
| Chân 19 | AVSS — Analog ground |
| Chân 20 | AVDD — Analog positive supply |
| Chân 21 | RPB4/AN4 — Remappable I/O, analog input 4 |
| Chân 22 | RPB5/AN5 — Remappable I/O, analog input 5 |
| Chân 23 | RPB6/AN6 — Remappable I/O, analog input 6 |
| Chân 24 | RPB7/AN7 — Remappable I/O, analog input 7 |
| Chân 25 | RPB8/AN8 — Remappable I/O, analog input 8 |
| Chân 26 | RPB9/AN9 — Remappable I/O, analog input 9 |
| Chân 27 | RPB10/AN10 — Remappable I/O, analog input 10 |
| Chân 28 | RPB11/AN11 — Remappable I/O, analog input 11 |
| Chân 29 | VSS — Ground reference |
| Chân 30 | VDD — Positive supply (2.5 V to 3.6 V) |
| Chân 31 | RPB12 — Remappable I/O |
| Chân 32 | RPB13 — Remappable I/O |
| Chân 33 | RPB14 — Remappable I/O |
| Chân 34 | RPB15 — Remappable I/O |
| Chân 35 | VSS — Ground reference |
| Chân 36 | RC1 — Port C bit 1 |
| Chân 37 | RC2 — Port C bit 2 |
| Chân 38 | RC3 — Port C bit 3 |
| Chân 39 | RC4 — Port C bit 4 |
| Chân 40 | OSC1 — Crystal oscillator input |
| Chân 41 | OSC2 — Crystal oscillator output |
| Chân 42 | VDD — Positive supply (2.5 V to 3.6 V) |
| Chân 43 | PGED2 — Programming/debug data line 2 |
| Chân 44 | PGEC2 — Programming/debug clock line 2 |
Ứng dụng tiêu biểu
PIC32MX130F256D-50I/PT phù hợp cho 6 Áp dụngs: Capacitive Touch User Interface, Low-Cost Graphics HMI with PMP LCD, Consumer Audio Accessory with I2S Codec, USB HID Bridge / CDC Device, Industrial Sensor Node / Data Logger, mTouch Proximity / Slider Interface.
Capacitive Touch User Interface
The PIC32MX130F256D-50I/PT's mTouch capacitive touch sensing with 1 ns resolution charge-time measurement unit makes it ideal for button, slider, and proximity-sensing interfaces. The device supports up to 16 touch channels via Peripheral Pin Select, enabling flexible PCB routing without dedicated touch pins. With 256 KB Flash, designers can implement touch libraries, debounce state machines, and gesture recognition. Compared to discrete touch ICs, the integrated core eliminates a companion MCU, reducing BOM cost. The 50 MHz MIPS M4K core delivers 83 DMIPS, providing ample headroom for real-time touch scanning while running an application state machine. The 2.5 V-3.6 V supply range is compatible with battery-powered designs.
Được đề xuất
Low-Cost Graphics HMI with PMP LCD
The PIC32MX130F256D-50I/PT features a Parallel Master Port (PMP) capable of driving 8-bit parallel LCDs and external memory interfaces, making it suitable for low-cost graphical HMI panels. PMP operates up to the system clock, so at 50 MHz the parallel bus delivers high-throughput frame updates without DMA overhead. Combined with 16 KB SRAM and 256 KB Flash, the device can store fonts, menus, and bitmaps for small QVGA/WQVGA displays. The I2S peripheral supports digital audio output for HMI buzzers or codecs. Compared to serial-only MCUs, the PMP bus eliminates the need for an external display controller, saving 1-2 dollars BOM cost. PIC32MX130F256B-V/SS shares the same core in a smaller footprint for compact HMI daughterboards.
Được đề xuất
Consumer Audio Accessory with I2S Codec
The PIC32MX130F256D-50I/PT includes two I2S/SPI modules that interface directly with stereo audio codecs, supporting 16-bit to 32-bit sample widths at standard 44.1 kHz and 48 kHz rates. With 50 MHz MIPS M4K performance (83 DMIPS), the core can run real-time audio mixing, equalization, or simple synthesis algorithms alongside the I2S DMA. The 16 KB SRAM provides buffer space for 50-100 ms of audio at 48 kHz/16-bit stereo, sufficient for click/pop elimination and basic effects. The 2.5 V-3.6 V supply is compatible with single-cell Li-ion + LDO designs. For more demanding audio processing, scale up to PIC32MX2xx devices; the 256D-50I/PT is the cost-optimized sweet spot for digital audio peripherals.
Được đề xuất
USB HID Bridge / CDC Device
Although the PIC32MX130F256D-50I/PT lacks an on-chip USB peripheral, it can implement USB device-class firmware (HID, CDC) using Microchip's USB stack with external comparators or a USB3300 external transceiver. At 50 MHz the core comfortably handles USB 1.1 Low/Full-speed polling, descriptor parsing, and HID report generation. 256 KB Flash accommodates the full Microchip MLA USB stack while leaving room for application code. The two UART modules can be bridged to USB CDC, providing a serial-to-USB converter with no external bridge IC. For a native-USB single-chip solution, jump to PIC32MX2xx or PIC32MK devices, but the 130 series offers the best cost for HID-class bridges.
Được đề xuất
Industrial Sensor Node / Data Logger
The PIC32MX130F256D-50I/PT's 10-bit ADC (up to 1 Msps), 16-channel input capability, and industrial temperature grade (-40C to +85C) make it well-suited for multi-sensor data acquisition nodes. With 256 KB Flash and 16 KB SRAM, designers can implement SD-card logging stacks or wireless UART drivers for sensor data buffering. The on-chip temperature sensor provides die-level monitoring for sensor compensation. Peripheral Pin Select allows the ADC inputs and UART/SPI interfaces to be reassigned to optimize PCB routing for multi-board designs. Compared to 8-bit PIC MCUs, the 32-bit core delivers 5-10x faster DSP for FFT-based vibration analysis or sensor filtering.
Được đề xuất
mTouch Proximity / Slider Interface
Beyond simple buttons, the PIC32MX130F256D-50I/PT supports mTouch proximity detection and slider gestures through its high-resolution CTMU. With 1 ns resolution on charge-time measurement, the MCU can detect capacitive changes well below 1 pF, enabling proximity wake-up from sealed enclosures. The 50 MHz core runs the touch scan loop in tens of microseconds, leaving MIPS headroom for the application main loop. Peripheral Pin Select removes the rigidity of fixed touch pins, so slider electrodes can be routed to any available GPIO. 16 KB SRAM buffers scan results without flicker; 256 KB Flash stores calibration tables for environmental compensation.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC32MX130F256D-50I/PT — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC32MX130F256D-I/PT | PIC32MX130F256DT-50I/PT | PIC32MX130F256B-50I/SS |
|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-pin TQFP (10x10 mm) | 44-pin TQFP (10x10 mm) - same | 44-pin TQFP (10x10 mm) - same | 28-pin SSOP - smaller |
| Maximum CPU Frequency | 50 MHz | 40 MHz | 50 MHz | 50 MHz |
| Flash Memory | 256 KB | 256 KB | 256 KB | 256 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB |
| Operating Voltage | 2.5 V to 3.6 V | 2.5 V to 3.6 V | 2.5 V to 3.6 V | 2.5 V to 3.6 V |
| I/O Pins | 34 | 34 | 34 | 21 |
| Parallel Master Port | Yes | Yes | Yes | No |
Bảo phân biệt quan trọng
- 50 MHz / 83 DMIPS with industrial temp grade (vsPIC32MX130F256D-I/PT)
- Same die as standard variant, just tape-and-reel packaging (vsPIC32MX130F256DT-50I/PT)
- 44-pin TQFP with PMP (vsPIC32MX130F256B-50I/SS)
Ghi chú thiết kế
Decouple VDD with 100 nF ceramic plus 4.7 uF bulk per datasheet. Place 100 nF as close to each VDD/VSS pair as possible, ideally within 3 mm of the pin. The AVDD pin requires its own 100 nF + 10 uF network to keep ADC noise low; do not share its decoupling with digital VDD. For USB or PMP-driven designs, add a ferrite bead between digital and analog supply returns.
Route the crystal traces (OSC1, OSC2) within 5 mm of the MCU, surrounded by a ground guard trace to minimize capacitive coupling. Place the load capacitors immediately adjacent to the crystal pads. The PGEDx/PGECx pins should be routed away from high-frequency signals to avoid debug-time glitches. For PMP-based LCD interfaces, match trace lengths on the 8-bit data bus within 1 cm to avoid skew.
Peripheral Pin Select (PPS) must be configured and unlocked before enabling the peripheral; otherwise the peripheral functions will not appear on the desired pins. Avoid configuring PPS for analog functions (ADC, CVREF) as those have dedicated pins. Do not exceed 50 MHz on the system clock without verifying the PLL multiplier and input divider settings; misconfiguration can lock up the device and require a programmer recovery.
Thông tin tuân thủ
RoHS compliant per Microchip product page. Industrial temperature grade -40C to +85C. Not AEC-Q100 qualified - this part targets consumer and industrial markets.