PIC32MX664F128L-V/BG - 80MHz 32-bit MCU 128KB Flash USB OTG | Microchip
MPN: PIC32MX664F128L-V/BG ✓ Hoạt độngPIC32MX664F128L-V/BG Tóm tắt
The PIC32MX microcontroller family is built on the MIPS32 M4K core, an industry-standard 32-bit RISC architecture that delivers deterministic Dhrystone 2.1 performance up to 1.5 DMIPS per MHz. M4K MCUs are widely used in industrial, consumer, and connectivity-oriented applications where USB, CAN, or Ethernet must coexist with general-purpose digital and analog I/O. They fit into a hierarchy of microcontroller -> 32-bit MCU -> MIPS RISC MCU -> Microchip PIC32 family, and share toolchain support via MPLAB X IDE, MPLAB Harmony framework, and XC32 compiler.
Key features of the PIC32MX664F128L-V/BG include 128 KB Flash (128K x 8), 32 KB SRAM, a 10-bit 1 MSPS ADC, dedicated DMA with up to 8 channels, and a USB 2.0 full-speed OTG controller. The parallel master port (PMP) supports graphics interfaces and external memory. The 121-ball TFBGA (BG) package provides extensive I/O for highly integrated designs while keeping the footprint to 10 x 10 mm.
Architecture is the MIPS M4K core with 32-bit instruction and 32-bit data paths, hardware multiply/divide, single-cycle 32-bit shift, and a prefetch cache that improves Flash throughput. The peripheral bus matrix supports concurrent DMA between the ADC, USB, SPI, I2C, UART, and Ethernet MAC without CPU intervention, freeing the core for application code.
Typical applications include USB peripherals, industrial control with CAN connectivity, Ethernet-enabled embedded nodes, graphical user interfaces using the PMP bus, and low-cost barcode scanners. Designers can develop firmware using the MPLAB Harmony framework, the MPLAB X IDE, and the free XC32 compiler.
A key design consideration is power: at 80 MHz the core draws roughly 70 mA active and drops to single-digit mA in idle and low microamps in deep sleep. The -V extended grade operates from 2.3 V to 3.6 V, so logic-level peripherals must respect this range. The 121-ball TFBGA package requires reflow-compatible PCB land pattern design and X-ray inspection for production.
This page combines distributor pricing for PIC32MX664F128L-V/BG, drop-in same-package alternatives from the PIC32MX5/6/7 family, and practical design notes that go beyond what is found in the standalone manufacturer datasheet.
Bộ thay thế dễ dàng lắp đặt cho PIC32MX664F128L-V/BG — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC32MX664F128L-V/BG (cùng hình factor và footprint) — khác nhau ở ADC, Core Architecture, DMA Channels, Package, Timers.
PIC32MX564F128L-V/BG
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC32MX664F064L-V/BG
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC32MX795F512L-V/BG
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
PIC32MX575F512L-80V/BG
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
PIC32MX564F128LT-V/BG
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC32MX360F512L-80V/BG
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC32MX664F128L-V/BG Tỷ lệ tối đa & tính chất điện
| Core Architecture | MIPS32 M4K 32-bit RISC |
| Maximum CPU Frequency | 80 MHz |
| Program Flash Memory | 128 KB (128K x 8) |
| SRAM | 32 KB |
| Operating Voltage Range | 2.3 V to 3.6 V (-V grade) |
| ADC | 10-bit, up to 16 channels, 1 MSPS |
| USB | USB 2.0 Full-Speed OTG |
| Ethernet | 10/100 Mbps MAC (RMII/MII) |
| CAN | 1x CAN 2.0B |
| UART | 2 |
| I2C | 2 |
| SPI | 2 (or up to 4 depending on remap) |
| DMA Channels | 8 |
| Timers | 5 x 16-bit |
| Hộp | 121-TFBGA (10 x 10 mm) |
| Kiểu lắp đặt | Surface Mount (BGA) |
| Lead-Free / RoHS | Compliant (Microchip standard) |
Cấu hình chân PIC32MX664F128L-V/BG
| Chân A1 | VSS — Ground reference |
| Chân A2 | DD- — USB OTG data-minus (BG variant) |
| Chân A3 | RGMD — Reference ground or I/O (family-specific) |
| Chân A4 | AN0/C1IN+/CVREF+/RPA0 — Analog input / GPIO port A bit 0 |
| Chân A5 | AN1/C1IN-/CVREF-/RPA1 — Analog input / GPIO port A bit 1 |
| Chân A6 | AN2/C2IN+/RPA2 — Analog input / GPIO port A bit 2 |
| Chân A7 | AN3/C2IN-/RPA3 — Analog input / GPIO port A bit 3 |
| Chân A8 | AN4/RPA4 — Analog input / GPIO port A bit 4 |
| Chân A9 | AN5/RPA5 — Analog input / GPIO port A bit 5 |
| Chân A10 | AVDD — Analog supply voltage |
| Chân A11 | AVSS — Analog ground |
| Chân B1 | TCK/RPB8 — JTAG TCK / GPIO port B bit 8 |
| Chân B2 | TDO/RPB9 — JTAG TDO / GPIO port B bit 9 |
| Chân B3 | NC — Not connected (no internal bond) |
| Chân B4 | AN6/RPA6 — Analog input / GPIO port A bit 6 |
| Chân B5 | AN7/RPA7 — Analog input / GPIO port A bit 7 |
| Chân B6 | AN8/RPB0 — Analog input / GPIO port B bit 0 |
| Chân B7 | AN9/RPB1 — Analog input / GPIO port B bit 1 |
| Chân B8 | AN10/CVREFOUT/RPB2 — Analog input / GPIO port B bit 2 |
| Chân B9 | AN11/RPB3 — Analog input / GPIO port B bit 3 |
| Chân B10 | AN12/RPB4 — Analog input / GPIO port B bit 4 |
| Chân B11 | AN13/RPB5 — Analog input / GPIO port B bit 5 |
| Chân C1 | TDI/RPB7 — JTAG TDI / GPIO port B bit 7 |
| Chân C2 | TMS/RPB6 — JTAG TMS / GPIO port B bit 6 |
| Chân C3 | VDD — Core logic supply voltage |
| Chân C4 | VSS — Ground |
| Chân C5 | VDD — Core logic supply voltage |
| Chân C6 | VSS — Ground |
| Chân C7 | VDD — Core logic supply voltage |
| Chân C8 | VSS — Ground |
| Chân C9 | VDD — Core logic supply voltage |
| Chân C10 | AN14/RPB10 — Analog input / GPIO port B bit 10 |
| Chân C11 | AN15/RPB11 — Analog input / GPIO port B bit 11 |
| Chân D1 | RC1 — GPIO port C bit 1 |
| Chân D2 | RC2 — GPIO port C bit 2 |
| Chân D3 | RC3 — GPIO port C bit 3 |
| Chân D4 | RC4 — GPIO port C bit 4 |
| Chân D5 | VSS — Ground |
| Chân D6 | VSS — Ground |
| Chân D7 | OSC1 — Primary oscillator input |
| Chân D8 | OSC2 — Primary oscillator output |
| Chân D9 | VDD — Core logic supply voltage |
| Chân D10 | VDD — Core logic supply voltage |
| Chân D11 | RD0 — GPIO port D bit 0 |
| Chân E1 | RD1 — GPIO port D bit 1 |
| Chân E2 | RD2 — GPIO port D bit 2 |
| Chân E3 | RD3 — GPIO port D bit 3 |
| Chân E4 | RD4 — GPIO port D bit 4 |
| Chân E5 | RD5 — GPIO port D bit 5 |
| Chân E6 | RD6 — GPIO port D bit 6 |
| Chân E7 | RD7 — GPIO port D bit 7 |
| Chân E8 | RE0 — GPIO port E bit 0 |
| Chân E9 | RE1 — GPIO port E bit 1 |
| Chân E10 | RE2 — GPIO port E bit 2 |
| Chân E11 | RE3 — GPIO port E bit 3 |
| Chân F1 | RE4 — GPIO port E bit 4 |
| Chân F2 | RE5 — GPIO port E bit 5 |
| Chân F3 | RE6 — GPIO port E bit 6 |
| Chân F4 | RE7 — GPIO port E bit 7 |
| Chân F5 | RF0 — GPIO port F bit 0 |
| Chân F6 | RF1 — GPIO port F bit 1 |
| Chân F7 | SDA1/RF4 — I2C SDA / GPIO port F bit 4 |
| Chân F8 | SCL1/RF5 — I2C SCL / GPIO port F bit 5 |
| Chân F9 | RF2 — GPIO port F bit 2 |
| Chân F10 | RF3 — GPIO port F bit 3 |
| Chân F11 | RF6 — GPIO port F bit 6 |
| Chân G1 | RG0 — GPIO port G bit 0 |
| Chân G2 | RG1 — GPIO port G bit 1 |
| Chân G3 | RG2 — GPIO port G bit 2 |
| Chân G4 | RG3 — GPIO port G bit 3 |
| Chân G5 | RG6 — GPIO port G bit 6 |
| Chân G6 | RG7 — GPIO port G bit 7 |
| Chân G7 | RG8 — GPIO port G bit 8 |
| Chân G8 | RG9 — GPIO port G bit 9 |
| Chân G9 | RF7 — GPIO port F bit 7 |
| Chân G10 | RF8 — GPIO port F bit 8 |
| Chân G11 | RF9 — GPIO port F bit 9 |
| Chân H1 | RG12 — GPIO port G bit 12 |
| Chân H2 | RG13 — GPIO port G bit 13 |
| Chân H3 | RG14 — GPIO port G bit 14 |
| Chân H4 | RG15 — GPIO port G bit 15 |
| Chân H5 | VSS — Ground |
| Chân H6 | VDD — Core logic supply voltage |
| Chân H7 | RH — GPIO port H bit 0 |
| Chân H8 | RH1 — GPIO port H bit 1 |
| Chân H9 | RH2 — GPIO port H bit 2 |
| Chân H10 | RH3 — GPIO port H bit 3 |
| Chân H11 | RH4 — GPIO port H bit 4 |
| Chân J1 | RH5 — GPIO port H bit 5 |
| Chân J2 | RH6 — GPIO port H bit 6 |
| Chân J3 | RH7 — GPIO port H bit 7 |
| Chân J4 | RH8 — GPIO port H bit 8 |
| Chân J5 | RH9 — GPIO port H bit 9 |
| Chân J6 | RH10 — GPIO port H bit 10 |
| Chân J7 | RH11 — GPIO port H bit 11 |
| Chân J8 | RH12 — GPIO port H bit 12 |
| Chân J9 | RH13 — GPIO port H bit 13 |
| Chân J10 | RH14 — GPIO port H bit 14 |
| Chân J11 | RH15 — GPIO port H bit 15 |
| Chân K1 | VSS — Ground |
| Chân K2 | VDD — Core logic supply voltage |
| Chân K3 | RJ0 — GPIO port J bit 0 |
| Chân K4 | RJ1 — GPIO port J bit 1 |
| Chân K5 | RJ2 — GPIO port J bit 2 |
| Chân K6 | RJ3 — GPIO port J bit 3 |
| Chân K7 | VSS — Ground |
| Chân K8 | VDD — Core logic supply voltage |
| Chân K9 | VSS — Ground |
| Chân K10 | VDD — Core logic supply voltage |
| Chân K11 | VSS — Ground |
| Chân L1 | TCK — JTAG TCK alternate location (family-specific) |
| Chân L2 | TMS — JTAG TMS alternate location |
| Chân L3 | NC — Not connected |
| Chân L4 | NC — Not connected |
| Chân L5 | D+ — USB OTG data-plus |
| Chân L6 | VUSB — USB transceiver supply |
| Chân L7 | NC — Not connected |
| Chân L8 | NC — Not connected |
| Chân L9 | NC — Not connected |
| Chân L10 | NC — Not connected |
| Chân L11 | NC — Not connected |
| Chân M1 | VSS — Ground |
| Chân M2 | VSS — Ground |
| Chân M3 | NC — Not connected |
| Chân M4 | NC — Not connected |
| Chân M5 | DD- — USB OTG data-minus (alternate) |
| Chân M6 | VSS — Ground |
| Chân M7 | NC — Not connected |
| Chân M8 | NC — Not connected |
| Chân M9 | NC — Not connected |
| Chân M10 | NC — Not connected |
| Chân M11 | NC — Not connected |
| Chân N1 | VSS — Ground |
| Chân N2 | VBUS — USB VBUS detect |
| Chân N3 | D+ — USB OTG data-plus (alternate) |
| Chân N4 | NC — Not connected |
| Chân N5 | RG6 — GPIO port G bit 6 (alternate) |
| Chân N6 | RG7 — GPIO port G bit 7 (alternate) |
| Chân N7 | RG8 — GPIO port G bit 8 (alternate) |
| Chân N8 | RG9 — GPIO port G bit 9 (alternate) |
| Chân N9 | NC — Not connected |
| Chân N10 | NC — Not connected |
| Chân N11 | NC — Not connected |
Ứng dụng tiêu biểu
PIC32MX664F128L-V/BG phù hợp cho 6 Áp dụngs: USB HID / CDC Industrial Peripherals, Ethernet-Enabled Sensor / IoT Edge Nodes, CAN-Based Automotive Body / Comfort Modules, Graphics / PMP-Driven User Interfaces, Industrial Data Acquisition / Control, Connected Consumer / Home Automation Hubs.
USB HID / CDC Industrial Peripherals
The PIC32MX664F128L-V/BG is purpose-built for USB peripherals that need a deterministic 32-bit MCU. Its 80 MHz MIPS M4K core executes USB stack tasks with ample headroom while the integrated USB 2.0 Full-Speed OTG controller manages bus protocol, descriptors, and endpoint handling. The 32 KB SRAM fits HID class, CDC device, and HID class + vendor interfaces without external memory. The 10-bit 1 MSPS ADC samples analog sensors at low frequency for human-interface devices. Use this part when the firmware requires USB host stack for downstream devices or OTG dual-role with DMA-driven endpoint transfers for low CPU overhead.
Được đề xuất
Ethernet-Enabled Sensor / IoT Edge Nodes
The PIC32MX664F128L-V/BG integrates a 10/100 Ethernet MAC that pairs with an external PHY for connected edge nodes in industrial IoT. The 80 MHz MIPS M4K core runs TCP/IP stacks such as Microchip Harmony TCP/IP Lite, while 32 KB SRAM holds network buffers and socket context. The two UARTs interface to RS-485 / Modbus sensors, the CAN 2.0B controller talks to industrial bus nodes, and the 10-bit ADC samples analog sensors before forwarding them over Ethernet. Use this part when you need low BOM count and one chip to handle networking, analog sampling, and fieldbus on the factory floor.
Được đề xuất
CAN-Based Automotive Body / Comfort Modules
The PIC32MX664F128L-V/BG's integrated CAN 2.0B controller plus USB OTG and PWM makes it a fit for non-safety automotive body modules such as HVAC controllers, lighting modules, and door modules. The 8-channel DMA moves ADC samples and UART streams without CPU intervention, leaving the MIPS M4K 32-bit core free for control loops. The 10-bit 1 MSPS ADC reads multiple analog channels for ambient light, temperature, and current sensing. The 121-ball TFBGA package supports the dense I/O required by body modules. Note: for functional-safety applications requiring AEC-Q100, choose an AEC-Q100 qualified PIC32 part.
Được đề xuất
Graphics / PMP-Driven User Interfaces
The PIC32MX664F128L-V/BG has a parallel master port (PMP) that drives small TFT displays, character LCDs, or external SRAM / PSRAM for graphical user interfaces. The 80 MHz MIPS core renders menus and basic animations while the PMP streams pixel data into the display. The 10-bit ADC handles touch-screen resistive inputs and the two UARTs interface to Wi-Fi or Bluetooth modules for connected GUI nodes. Use it for simple HMI panels, instrumentation display units, and appliance controls where parallel-display bandwidth and 32-bit performance are required in a single chip.
Được đề xuất
Industrial Data Acquisition / Control
The PIC32MX664F128L-V/BG's 10-bit 1 MSPS ADC with up to 16 channels, DMA, and dual UART makes it a strong choice for industrial data acquisition and control. The MIPS M4K core runs control loops, the DMA streams ADC samples into memory without CPU load, and the dual UARTs expose RS-232 / RS-485 channels for legacy industrial protocols. The CAN controller ties into plant bus networks, while the Ethernet MAC streams logged data to a host. Use it for compact DIN-rail data loggers, motor-control command boards, and multi-protocol industrial bridges in production automation environments.
Được đề xuất
Connected Consumer / Home Automation Hubs
The PIC32MX664F128L-V/BG fits consumer home automation gateways that need Ethernet, USB OTG (for Wi-Fi / ZigBee / Bluetooth dongles), and CAN for legacy subsystems. The 32 KB SRAM buffers network state while 128 KB Flash holds protocol stacks and application logic. The 10-bit ADC monitors power rails, temperature, and battery, while the dual I2C interfaces sensors and RTC chips. With USB OTG host mode, the MCU can manage Bluetooth or ZigBee dongles directly without an external host. Use it for low-cost connected hubs that bridge Ethernet to USB-based radios and CAN-based appliances.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC32MX664F128L-V/BG — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC32MX564F128L-V/BG | PIC32MX664F064L-V/BG | PIC32MX795F512L-V/BG | PIC32MX575F512L-80V/BG | PIC32MX564F128LT-V/BG | PIC32MX360F512L-80V/BG |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 121-TFBGA (10 x 10 mm) (BG) | 121-TFBGA (10 x 10 mm) (BG) - same | 121-TFBGA (10 x 10 mm) (BG) - same | 121-TFBGA (10 x 10 mm) (BG) - same | 121-TFBGA (10 x 10 mm) (BG) - same | 121-TFBGA (10 x 10 mm) (BG) - same | 121-TFBGA (10 x 10 mm) (BG) - same |
| Core Architecture | MIPS32 M4K | MIPS32 M4K | MIPS32 M4K | MIPS32 M4K | MIPS32 M4K | MIPS32 M4K | MIPS32 M4K |
| Maximum CPU Frequency | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz |
| Flash Memory | 128 KB | 128 KB | 64 KB (-50%) | 512 KB (+300%) | 512 KB (+300%) | 128 KB | 512 KB (+300%) |
| SRAM | 32 KB | 32 KB | 32 KB | 128 KB (+300%) | 64 KB (+100%) | 32 KB | 128 KB (+300%) |
| USB OTG | Yes (USB 2.0 FS) | No | Yes (USB 2.0 FS) | Yes (USB 2.0 FS) | Yes (USB 2.0 FS) | No | Yes (USB 2.0 FS) |
| Ethernet MAC | Yes (10/100) | No | Yes (10/100) | Yes (10/100) | No | No | No |
| CAN 2.0B | Yes | Yes | Yes | Yes | No | Yes | No |
| ADC Resolution | 10-bit, 1 MSPS | 10-bit, 1 MSPS | 10-bit, 1 MSPS | 10-bit, 1 MSPS | 10-bit, 1 MSPS | 10-bit, 1 MSPS | 10-bit, 1 MSPS |
Bảo phân biệt quan trọng
- Higher SRAM than the PIC32MX5xx baseline (vsPIC32MX575F512L-80V/BG)
- Equal Flash to PIC32MX564F128L-V/BG plus integrated USB OTG (vsPIC32MX564F128L-V/BG)
- Lower Flash than the PIC32MX795F512L-V/BG but at lower cost (vsPIC32MX795F512L-V/BG)
Ghi chú thiết kế
The 121-ball TFBGA (10 x 10 mm) package requires a BGA land pattern with 0.8 mm ball pitch. Use NSMD (non-solder-mask-defined) pads for better joint reliability, with a via-in-pad approach if multiple layers need to escape the inner balls. Run microstrip signal traces on the top layer with a continuous ground plane on layer 2 for the high-speed USB and Ethernet signals. X-ray inspection after reflow is recommended for production.
Power supply is at 2.3 V to 3.6 V. Decouple each VDD/VSS pair with a 100 nF ceramic capacitor placed within 1 mm of the ball. Add a bulk 10 uF ceramic on the main VDD rail to absorb USB hot-plug and Ethernet PHY load steps. Tie AVDD/AVSS through ferrite beads to isolate the analog reference of the 10-bit ADC from digital switching noise. The VUSB pin requires a 100 nF bypass plus an LC filter bead for USB transceiver cleanliness.
Route the USB D+/D- pair as a 90-ohm differential with matched length (within 150 mil). For RMII Ethernet, the 50 MHz clock and the 1-bit data lines must be tightly length-matched. The 121-ball TFBGA escape routing on layer 1 should use 50-ohm microstrip with continuous reference ground; avoid crossing any signal over split ground pours. Series termination on RMII lines is often unnecessary at 50 MHz but verify with TDR measurement.
Do not exceed 3.6 V on any VDD ball; -V grade parts are 2.3 V to 3.6 V, but absolute-maximum ratings are stricter than IEC 60140 tolerance for over-voltage transient suppression. Configure unused I/O balls as digital inputs with the weak pull-up enabled or as outputs driving low to avoid floating inputs that draw shoot-through current. When migrating between BG-package variants, verify peripheral ball mapping because some balls have remapped functions across PIC32MX5/6/7 sub-families.
Thông tin tuân thủ
RoHS / REACH compliance is Microchip's standard for the PIC32MX6 series; the -V grade is not AEC-Q100 qualified, so automotive safety designs should select AEC-Q100 qualified PIC32MX variants.
