PIC32MX795F512L-80I/PF - 80MHz 32-bit MCU, USB, CAN, Ethernet | Microchip
MPN: PIC32MX795F512L-80I/PF ✓ Hoạt độngPIC32MX795F512L-80I/PF Tóm tắt
A 32-bit microcontroller (MCU) is a single-chip processor that integrates a CPU core, program memory (Flash), data memory (SRAM), and a rich set of peripherals (timers, ADC, communication interfaces) on a single silicon die. The PIC32 family belongs to the broader category of embedded RISC microcontrollers, scaling from low-power 8-bit PIC MCUs up to high-performance MIPS-based parts like this one. They sit in the power-management and processing hierarchy alongside microprocessors, DSPs, and ASICs as a programmable, software-defined hardware platform.
Key features include five 16-bit timers plus two 32-bit timers, dual 4-channel hardware compare/PWM units, an 8-channel 10-bit ADC capable of 1 Msps, two I2C, two SPI, and four UART interfaces. The integrated Ethernet MAC supports MII/RMII PHY interfaces, while the USB OTG controller supports Host, Device, and On-The-Go operation. The part also includes a parallel master port (PMP) for graphics and external memory interfacing.
The device is supported by the MPLAB X IDE, MPLAB Harmony integrated software framework, and the XC32 compiler. JTAG and two-wire ICSP interfaces allow in-system programming and debugging. Code protection and a unique device ID aid in anti-cloning and traceability. Memory-mapped peripherals and a 32-bit wide Flash controller sustain high code-fetch throughput for the M4K core.
Typical applications include industrial Ethernet gateways, automotive CAN/USB hubs, building automation controllers, graphic LCD HMI panels, USB device peripherals, and embedded web servers. Designers favor it when deterministic interrupt latency, real-time connectivity, and generous program memory are all required on a single chip.
A key design consideration is power budgeting: at 80 MHz across 3.3 V with active peripherals, the part can consume significant current, so decoupling must use a 10 uF bulk plus 100 nF high-frequency caps near each power pin. Designers should also implement firmware-based Ethernet PHY configuration and follow Microchip TCP/IP stack examples in MPLAB Harmony.
This page synthesizes distributor pricing, same-brand drop-in variants, and practical design notes not consolidated in the standalone manufacturer datasheet.
Bộ thay thế dễ dàng lắp đặt cho PIC32MX795F512L-80I/PF — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC32MX795F512L-80I/PF (cùng hình factor và footprint) — khác nhau ở Timers, DMA Channels, Package, Operating Temperature, ADC.
PIC32MX795F512LT-80I/PF
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
PIC32MX795F512L-80I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC32MX795F512L-80I/PF Tỷ lệ tối đa & tính chất điện
| Core Architecture | MIPS32 M4K (32-bit RISC) |
| Maximum CPU Clock | 80 MHz |
| DMIPS Performance | 105 DMIPS (1.56 DMIPS/MHz) |
| Program Memory (Flash) | 512 KB (512K x 8) |
| Data Memory (SRAM) | 128 KB |
| Supply Voltage (VDD) | 2.3 V to 3.6 V |
| Khoảng nhiệt độ hoạt động | -40C to +85C (Industrial, I-temp) |
| Hộp | 100-pin TQFP (14 x 14 mm) |
| I/O Pins | 51 (general-purpose) |
| Ethernet | 10/100 Mbit MAC (MII/RMII) |
| USB | USB 2.0 On-The-Go (Host/Device/OTG) |
| CAN | 2 x CAN 2.0b controllers |
| DMA Channels | 8 dedicated channels |
| Timers | 5 x 16-bit + 2 x 32-bit |
| ADC | 10-bit, up to 1 Msps |
| UART / SPI / I2C | 4 UART / 2 SPI / 2 I2C |
| Parallel Master Port (PMP) | Yes (for graphics/external memory) |
| Programming/Debug Interface | JTAG + 2-wire ICSP |
| Kiểu lắp đặt | Surface Mount |
| Trạng thái RoHS | Compliant |
Cấu hình chân PIC32MX795F512L-80I/PF
| Chân 1 | SOCK5/RF5 — GPIO RF5 / Ethernet RMII clock |
| Chân 2 | RG6/SOCC — GPIO RG6 / Ethernet system clock output |
| Chân 3 | RG7/RG8 — GPIO RG7 / Ethernet data reference |
| Chân 4 | RG8/RG9 — GPIO RG8 / Ethernet PHY clock |
| Chân 5 | MCLR — Master clear reset (active low) |
| Chân 6 | AVDD — Analog supply (3.3V) |
| Chân 7 | AVSS — Analog ground |
| Chân 8 | PGEC1/AN14 — ICSP clock / ADC input |
| Chân 9 | PGED1/AN15 — ICSP data / ADC input |
| Chân 10 | PGEC2/AN0 — ICSP clock2 / ADC channel 0 |
| Chân 11 | PGED2/AN1 — ICSP data2 / ADC channel 1 |
| Chân 12 | AN2/C2IN- — ADC / comparator input |
| Chân 13 | AN3/C2IN+ — ADC / comparator input |
| Chân 14 | AN4/C1IN- — ADC / comparator input |
| Chân 15 | AN5/C1IN+ — ADC / comparator input |
| Chân 16 | AN6 — ADC channel 6 |
| Chân 17 | AN7 — ADC channel 7 |
| Chân 18 | AN8 — ADC channel 8 |
| Chân 19 | AN9 — ADC channel 9 |
| Chân 20 | AVDD — Analog supply (3.3V) |
| Chân 21 | AVSS — Analog ground |
| Chân 22 | VDD — Digital supply (3.3V) |
| Chân 23 | VSS — Digital ground |
| Chân 24 | OSC1/CLKI — Crystal input / external clock |
| Chân 25 | OSC2/CLKO — Crystal output / system clock out |
| Chân 26 | VBUS — USB VBUS sense |
| Chân 27 | D- — USB D- (OTG data) |
| Chân 28 | D+ — USB D+ (OTG data) |
| Chân 29 | VUSB — USB transceiver supply (3.3V) |
| Chân 30 | VDD — Digital supply (3.3V) |
| Chân 31 | VSS — Digital ground |
| Chân 32 | RA0 — GPIO port A bit 0 |
| Chân 33 | RA1 — GPIO port A bit 1 |
| Chân 34 | RA2 — GPIO port A bit 2 |
| Chân 35 | RA3 — GPIO port A bit 3 |
| Chân 36 | RA4 — GPIO port A bit 4 |
| Chân 37 | RA5 — GPIO port A bit 5 |
| Chân 38 | RA6 — GPIO port A bit 6 |
| Chân 39 | RA7 — GPIO port A bit 7 |
| Chân 40 | RB0 — GPIO port B bit 0 |
| Chân 41 | RB1 — GPIO port B bit 1 |
| Chân 42 | RB2 — GPIO port B bit 2 |
| Chân 43 | RB3 — GPIO port B bit 3 |
| Chân 44 | RB4 — GPIO port B bit 4 |
| Chân 45 | RB5 — GPIO port B bit 5 |
| Chân 46 | RB6 — GPIO port B bit 6 |
| Chân 47 | RB7 — GPIO port B bit 7 |
| Chân 48 | RB8 — GPIO port B bit 8 |
| Chân 49 | RB9 — GPIO port B bit 9 |
| Chân 50 | VDD — Digital supply (3.3V) |
| Chân 51 | VSS — Digital ground |
| Chân 52 | RC1 — GPIO port C bit 1 (PMP) |
| Chân 53 | RC2 — GPIO port C bit 2 (PMP) |
| Chân 54 | RC3 — GPIO port C bit 3 (PMP) |
| Chân 55 | RC4 — GPIO port C bit 4 (PMP) |
| Chân 56 | RD0 — GPIO port D bit 0 |
| Chân 57 | RD1 — GPIO port D bit 1 |
| Chân 58 | RD2 — GPIO port D bit 2 |
| Chân 59 | RD3 — GPIO port D bit 3 |
| Chân 60 | RD4 — GPIO port D bit 4 |
| Chân 61 | RD5 — GPIO port D bit 5 |
| Chân 62 | RD6 — GPIO port D bit 6 |
| Chân 63 | RD7 — GPIO port D bit 7 |
| Chân 64 | RD8 — GPIO port D bit 8 |
| Chân 65 | RD9 — GPIO port D bit 9 |
| Chân 66 | RD10 — GPIO port D bit 10 |
| Chân 67 | RD11 — GPIO port D bit 11 |
| Chân 68 | RD12 — GPIO port D bit 12 |
| Chân 69 | RD13 — GPIO port D bit 13 |
| Chân 70 | RD14 — GPIO port D bit 14 |
| Chân 71 | RD15 — GPIO port D bit 15 |
| Chân 72 | RE0 — GPIO port E bit 0 |
| Chân 73 | RE1 — GPIO port E bit 1 |
| Chân 74 | RE2 — GPIO port E bit 2 |
| Chân 75 | RE3 — GPIO port E bit 3 |
| Chân 76 | RE4 — GPIO port E bit 4 |
| Chân 77 | RE5 — GPIO port E bit 5 |
| Chân 78 | RE6 — GPIO port E bit 6 |
| Chân 79 | RE7 — GPIO port E bit 7 |
| Chân 80 | RE8 — GPIO port E bit 8 (CAN) |
| Chân 81 | RE9 — GPIO port E bit 9 (CAN) |
| Chân 82 | RF0 — GPIO port F bit 0 |
| Chân 83 | RF1 — GPIO port F bit 1 |
| Chân 84 | RF2 — GPIO port F bit 2 |
| Chân 85 | RF3 — GPIO port F bit 3 |
| Chân 86 | RF4 — GPIO port F bit 4 |
| Chân 87 | RF5 — GPIO port F bit 5 |
| Chân 88 | VDD — Digital supply (3.3V) |
| Chân 89 | VSS — Digital ground |
| Chân 90 | RG0 — GPIO port G bit 0 (Eth MII) |
| Chân 91 | RG1 — GPIO port G bit 1 (Eth MII) |
| Chân 92 | RG2 — GPIO port G bit 2 (Eth MII) |
| Chân 93 | RG3 — GPIO port G bit 3 (Eth MII) |
| Chân 94 | RG4 — GPIO port G bit 4 |
| Chân 95 | RG5 — GPIO port G bit 5 |
| Chân 96 | RG6 — GPIO port G bit 6 |
| Chân 97 | RG7 — GPIO port G bit 7 |
| Chân 98 | RG8 — GPIO port G bit 8 |
| Chân 99 | RG9 — GPIO port G bit 9 |
| Chân 100 | NC — Not connected (per datasheet) |
Ứng dụng tiêu biểu
PIC32MX795F512L-80I/PF phù hợp cho 7 Áp dụngs: Industrial Ethernet Gateway, Automotive CAN Bus Hub, USB Device Peripheral Interface, Building Automation Controller, Graphic LCD HMI Panel, Embedded Web Server / IoT Edge Node, Industrial Data Logger.
Industrial Ethernet Gateway
The PIC32MX795F512L-80I/PF is well-suited as the main processor in industrial Ethernet gateways because it integrates a 10/100 Mbit MAC alongside USB OTG and dual CAN peripherals on the same die. At 80 MHz the M4K core sustains TCP/IP throughput via the Microchip TCP/IP stack while leaving headroom for application logic, and the 128 KB SRAM accommodates a full IPv4/IPv6 stack plus buffers. Designers typically pair it with an external PHY (e.g., KSZ8041) on the MII interface and use CAN for on-machine side buses.
Được đề xuất
Automotive CAN Bus Hub
With two hard IP CAN 2.0b controllers and an 80 MHz core, the PIC32MX795F512L-80I/PF bridges multiple automotive CAN buses (powertrain, body, chassis) into a single gateway node. The 512 KB Flash supports complex routing tables and OBD-II diagnostic stacks, while the 128 KB SRAM handles concurrent message buffers. The -40C to +85C industrial temperature range suits cabin-mounted ECUs; for under-hood applications consider AEC-Q100 grade PIC32 variants.
Được đề xuất
USB Device Peripheral Interface
The on-board USB 2.0 On-The-Go controller and the 51 GPIO pins make the PIC32MX795F512L-80I/PF a flexible USB device for instrumentation, data loggers, or human-interface devices. At 80 MHz it handles USB HID, CDC, and vendor-class endpoints with deterministic interrupt latency, while the 512 KB Flash accommodates bootloader plus application code. The parallel master port (PMP) gives designers an easy path to FPGA or display add-ons for advanced USB-to-anything bridges.
Được đề xuất
Building Automation Controller
The PIC32MX795F512L-80I/PF integrates BACnet, Modbus TCP, and other building protocols onto a single 80 MHz core, eliminating the multiple MCUs typical of legacy HVAC panels. The 2.3 V to 3.6 V VDD range suits 24 V derived industrial power, and the dual CAN buses handle BACnet MS/TP alongside proprietary sub-system buses. The Ethernet MAC drives modern IP-based BMS backbones without external TCP/IP silicon.
Được đề xuất
Graphic LCD HMI Panel
The PIC32MX795F512L-80I/PF drives small TFT LCDs via its parallel master port (PMP) while running touch-screen and UI rendering at 80 MHz, eliminating the need for a separate graphics controller. The 128 KB SRAM serves as a framebuffer for QVGA or smaller displays, and 512 KB Flash stores fonts, icons, and multilingual assets. USB OTG supports external diagnostic or programming tablets.
Được đề xuất
Embedded Web Server / IoT Edge Node
The Ethernet MAC plus 512 KB Flash and 128 KB SRAM allow the PIC32MX795F512L-80I/PF to host an embedded web server with HTTPS, MQTT, and Modbus TCP simultaneously, which is a rare mix at this price point. The 51 GPIOs drive relays, sensors, and actuators for retrofit IoT edge nodes. Microchip's MPLAB Harmony TCP/IP stack and freeRTOS reference ports are production-ready, accelerating time-to-prototype.
Được đề xuất
Industrial Data Logger
The PIC32MX795F512L-80I/PF works as a stand-alone multi-channel industrial data logger by combining its 10-bit 1 Msps ADC, 51 GPIO, CAN, Ethernet, and USB interfaces. The 128 KB SRAM buffers transient bursts and the 512 KB Flash holds months of compressed logs. SD-card adapter cards via SPI extend non-volatile storage; the USB OTG port supports thumb-drive offload in the field.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC32MX795F512L-80I/PF — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC32MX795F512LT-80I/PF | PIC32MX795F512L-80I/PT |
|---|---|---|---|
| Package | 100-pin TQFP (14x14) | 100-pin TQFP (14x14) - same | 64-pin TQFP - different pinout |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Architecture | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit |
| Maximum CPU Clock | 80 MHz | 80 MHz | 80 MHz |
| Flash Memory | 512 KB | 512 KB | 512 KB |
| SRAM | 128 KB | 128 KB | 128 KB |
| Operating Voltage | 2.3 V to 3.6 V | 2.3 V to 3.6 V | 2.3 V to 3.6 V |
| Temperature Grade | Industrial (-40C to +85C) | Industrial (-40C to +85C) | Industrial (-40C to +85C) |
| Pin Count | 100 | 100 | 64 |
| USB | USB 2.0 OTG | USB 2.0 OTG | USB 2.0 OTG |
| Ethernet MAC | 10/100 Mbit MII/RMII | 10/100 Mbit MII/RMII | 10/100 Mbit MII/RMII |
| CAN Controllers | 2 x CAN 2.0b | 2 x CAN 2.0b | 2 x CAN 2.0b |
Bảo phân biệt quan trọng
- Single-chip Ethernet + USB OTG + dual CAN integration (vsPIC24FJ256GB610-I/PT)
- Highest 80 MHz DMIPS performance in the PIC32MX family (vsPIC32MX675F512L-80I/PT)
- 512 KB Flash with 128 KB SRAM doubles embedded headroom of comparable PIC18 parts (vsPIC18F8722-I/PT)
- Mature software stack ecosystem (vsPIC32MX470F512L)
Ghi chú thiết kế
Per the PIC32MX5XX/6XX/7XX family datasheet, supply decoupling requires a 10 uF bulk tantalum/ceramic plus a 100 nF high-frequency ceramic capacitor on each VDD/AVDD pin pair. The 80 MHz core can draw transient currents exceeding 100 mA, so the bulk capacitor must have low ESR to prevent core voltage droop. Place the 100 nF cap within 5 mm of each pin and the bulk cap within 25 mm. A ferrite bead between AVDD and VDD is recommended when ADC and digital activity overlap, and the analog supply should be tied to digital +3.3 V at one point only.
The 100-pin TQFP at 0.5 mm pitch demands a 4-layer PCB with 0.2 mm/0.2 mm trace/space rules and a continuous ground plane under the device. Per Microchip's PIC32MX hardware design checklist, the crystal traces must be symmetric and short (less than 8 mm) with grounded guard traces to minimize EMI. USB D+/D- traces require 45 ohm differential impedance to the connector, and the Ethernet MII traces must be length-matched within 25 mm to avoid signal skew at 100 Mbit/s.
A common mistake is leaving the MCLR pin floating; the datasheet mandates a 10 kohm pull-up to VDD if the reset function is unused. Per the family datasheet, the Watchdog Timer disable sequence requires an unlock register write in a 32-bit instruction window — without it firmware may 'lock up' unintentionally. Designers should also configure the JTAG pins as digital I/O at reset to release RB10-RB13 for general use; otherwise an in-circuit programmer may interfere with peripheral selection.
When routing the parallel master port (PMP) to an LCD or external FPGA, length-matching control signals (RD, WR, CS) within 5 mm of the data bus to avoid setup/hold violations. Per the PIC32MX peripheral library documentation, the PMP timing registers PMCON and PMAEN must be tuned to the slave device's datasheet; default 80 MHz PMP timing assumes a 25 ns Tr/Tf requirement. For 100 Mbit Ethernet, place the termination resistors within 20 mm of the PHY and keep the MII pair isolated from switching nodes.
Thông tin tuân thủ
RoHS compliant per Microchip product page. Not AEC-Q100 qualified — automotive applications should use automotive-grade Microchip PIC32 variants such as the PIC32MX795F512L-E/PT or dedicated AEC-Q100 qualified lines. Tray packing (90 per tray) is lead-free and halogen-free per MicrochipDirect ordering info.