USB2513B-AEZC-TR - 3-Port USB 2.0 Hi-Speed Hub Controller | Microchip
MPN: USB2513B-AEZC-TR ✓ Hoạt độngUSB2513B-AEZC-TR Tóm tắt
A USB hub controller is a USB Interface IC that aggregates one upstream USB connection into multiple downstream ports, allowing many devices to share a single host root port. Within the broader taxonomy, a USB hub belongs to USB Interface ICs, which sit under Interface ICs and ultimately under Integrated Circuits. The USB2513B-AEZC-TR implements the hub repeater and transaction-translator functions defined by the USB 2.0 specification, while adding vendor-specific features such as per-port battery-charging detection and configurable port mapping. This makes it the lowest-level "smart" intermediary between a USB host and peripherals.
Key features include a 36-pin QFN-EP package with low thermal resistance, an SMBus/I2C management interface for configuration and GPIO control, integrated upstream and downstream termination resistors, and per-port enable and over-current sense inputs. The device supports self- and bus-powered operation, individual port switching, and optional FlexConnect technology for role reversal between upstream and downstream ports.
Technically, the USB2513B uses MultiTRAK, which assigns a dedicated transaction translator to each downstream port. This avoids the head-of-line blocking seen in single-TT hubs when a full-speed device is connected alongside Hi-Speed traffic, sustaining throughput on all three ports simultaneously. Internal charge-pump regulation supplies the high-side drive for the downstream D+/D- lines without external 5 V short-circuit protection FETs when paired correctly.
Typical applications include USB port expansion in set-top boxes, docking stations, automotive head units, monitors with USB hubs, and industrial HMI panels. Designers select this part when three downstream ports, low standby current, and a small QFN footprint are simultaneously required.
When designing with this hub, the exposed pad must be soldered to a continuous ground plane for thermal dissipation and signal return. Place the 3.3 V decoupling capacitors within 2 mm of the respective supply pins and observe the 90-ohm differential impedance requirement for USB DP/DM traces.
This page synthesizes distributor pricing, drop-in alternative MPNs, and practical design notes not found in the manufacturer datasheet alone, helping procurement and embedded design teams shorten the bill-of-material selection cycle.
Bộ thay thế dễ dàng lắp đặt cho USB2513B-AEZC-TR — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với USB2513B-AEZC-TR (cùng hình factor và footprint) — khác nhau ở Package, Number of Downstream Ports, Battery Charging Support, Device Type, MSL Level.
USB2513B-AEZC
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →USB2513BI-AEZG-TR
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
USB2513BT/M2
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →USB2514B-AEZC-TR
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
USB2512B-AEZG-TR
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
USB2513B-AEZC-TR Thông số kỹ thuật
| Product Type | USB 2.0 Hi-Speed Hub Controller |
| Number of Downstream Ports | 3 |
| USB Specification | USB 2.0 Hi-Speed (480 Mbps) |
| Điện áp cung cấp | 3.3 V |
| Khoảng nhiệt độ hoạt động | -40 C to +85 C |
| Hộp | 36-QFN (6x6 mm) with exposed pad |
| Kiểu lắp đặt | Surface Mount |
| Upstream Port | 1 Hi-Speed USB 2.0 port |
| Transaction Translator Topology | MultiTRAK (per-port TT) |
| Management Interface | SMBus / I2C |
| Battery Charging Support | Per-port BC1.2 detection (charging enable inputs) |
| Power Mode | Self-powered and bus-powered modes supported |
| Link Power Management | USB 2.0 LPM compliant |
| Cấp MSL | 3 (per JEDEC J-STD-020) |
| Trạng thái RoHS | Compliant |
| Lead-Free | Yes |
| Operating Power Modes | Active, Idle, Suspend, Power-down |
Cấu hình chân USB2513B-AEZC-TR
| Chân 1 | VDD33 — 3.3 V main supply |
| Chân 2 | DP1 — Downstream port 1 D+ line |
| Chân 3 | DM1 — Downstream port 1 D- line |
| Chân 4 | VBUS1 — Downstream port 1 VBUS sense |
| Chân 5 | OC1 — Downstream port 1 over-current sense |
| Chân 6 | PWR1 — Downstream port 1 power enable |
| Chân 7 | DP2 — Downstream port 2 D+ line |
| Chân 8 | DM2 — Downstream port 2 D- line |
| Chân 9 | VBUS2 — Downstream port 2 VBUS sense |
| Chân 10 | OC2 — Downstream port 2 over-current sense |
| Chân 11 | PWR2 — Downstream port 2 power enable |
| Chân 12 | DP3 — Downstream port 3 D+ line |
| Chân 13 | DM3 — Downstream port 3 D- line |
| Chân 14 | VBUS3 — Downstream port 3 VBUS sense |
| Chân 15 | OC3 — Downstream port 3 over-current sense |
| Chân 16 | PWR3 — Downstream port 3 power enable |
| Chân 17 | RESET — Chip reset, active low |
| Chân 18 | XTALIN — Crystal oscillator input |
| Chân 19 | XTALOUT — Crystal oscillator output |
| Chân 20 | CLKIN — External clock input (24 MHz) |
| Chân 21 | SDA — SMBus/I2C data |
| Chân 22 | SCL — SMBus/I2C clock |
| Chân 23 | SMBSUS — SMBus suspend / GPI |
| Chân 24 | CFG_NON_REM — Configuration: non-removable port |
| Chân 25 | PRTPWR — Port power control |
| Chân 26 | VBUS_UP — Upstream VBUS detect (5 V input) |
| Chân 27 | DP_UP — Upstream D+ line |
| Chân 28 | DM_UP — Upstream D- line |
| Chân 29 | RBIAS — External bias resistor reference |
| Chân 30 | VDD12 — 1.2 V internal regulator output (decoupling) |
| Chân 31 | TEST — Factory test pin (tie to GND in application) |
| Chân 32 | GND — Ground (multiple GND pins) |
| Chân 33 | GND — Ground |
| Chân 34 | GND — Ground |
| Chân 35 | GND — Ground |
| Chân 36 | EP — Exposed thermal pad - solder to ground plane |
Ứng dụng tiêu biểu
USB2513B-AEZC-TR phù hợp cho 6 Áp dụngs: Set-Top Box USB Port Expansion, Docking Station USB Hub, Monitor with Integrated USB Hub, Industrial HMI Panel, Automotive Infotainment Head Unit, Embedded Single-Board Computer USB Expansion.
Set-Top Box USB Port Expansion
The USB2513B-AEZC-TR's 3 downstream Hi-Speed ports and single 3.3 V supply make it a strong fit for set-top boxes that need to expose multiple USB peripherals (external storage, IR dongles, Wi-Fi adapters, game controllers) to the host SoC. MultiTRAK per-port transaction translators prevent a full-speed remote control from blocking Hi-Speed transfers to attached USB storage, sustaining aggregate throughput. Designers route the upstream port directly to the SoC's USB 2.0 OTG controller with a 90-ohm DP/DM differential pair and place the 3.3 V decoupling caps within 2 mm of the IC supply pins per Microchip reference layout guidance.
Được đề xuất
Docking Station USB Hub
For laptop docking stations that need a compact, low-power Hi-Speed hub, the USB2513B-AEZC-TR adds 3 downstream ports to the dock's USB-C input while consuming only milliwatts in suspend. The integrated SMBus/I2C management interface allows the dock MCU to enable/disable individual ports based on laptop connection state. MultiTRAK technology preserves throughput when the dock connects a USB 2.0 webcam alongside USB 3.x storage downstream. The 36-QFN (6x6) footprint fits beneath the dock's PCB-side I/O area without interfering with DisplayPort or HDMI routing.
Được đề xuất
Monitor with Integrated USB Hub
Computer monitors frequently embed a 3-port USB 2.0 hub to drive built-in webcams, microphones, and downstream-facing USB-A ports for keyboard/mouse. The USB2513B-AEZC-TR's small 36-QFN package and per-port battery-charging detection pins are well suited to this application, allowing the monitor to advertise charging current on selected ports without an external BC1.2 chip. Link Power Management (LPM) compliance lets the hub enter low-power states when the host PC is asleep, dropping standby current to under 1 mA per the Microchip datasheet.
Được đề xuất
Industrial HMI Panel
Industrial human-machine-interface (HMI) panels often require a rugged USB hub to connect touchscreens, barcode scanners, and configuration USB sticks to an embedded ARM SoC. The USB2513B-AEZC-TR's -40 C to +85 C commercial temperature range covers most factory-floor enclosures, and the industrial-grade USB2513BI-AEZG-TR variant extends coverage to harsh environments. MultiTRAK prevents a low-speed touch controller from degrading throughput on the scanner or USB-memory ports, which is critical for real-time operator response. The exposed thermal pad allows sustained port activity without thermal throttling.
Được đề xuất
Automotive Infotainment Head Unit
In automotive head units and rear-seat entertainment modules, the USB2513B-AEZC-TR provides 3 Hi-Speed downstream ports for media sticks, smartphone mirroring, and passenger device charging. Automotive-grade derivatives in the same 36-QFN footprint (with AEC-Q100 qualification) support -40 C to +105 C operation, making the same silicon family suitable for in-cabin use. The integrated per-port over-current sensing inputs simplify the wiring harness for downstream USB-A receptacles. Designers must still add external short-circuit protection FETs and automotive-qualified ESD arrays per automotive EMC requirements.
Được đề xuất
Embedded Single-Board Computer USB Expansion
Single-board computers (SBCs) such as the Raspberry Pi Compute Module, NXP i.MX8M, and STM32MP1 platforms often expose only one or two USB 2.0 host ports but need to connect several peripherals. The USB2513B-AEZC-TR expands a single USB 2.0 upstream port to 3 downstream ports, with each downstream port carrying its own TT, so a low-speed legacy peripheral cannot stall high-throughput peripherals. The exposed thermal pad and small QFN-36 footprint allow the hub to be placed directly under the SBC's USB header with minimal keep-out zones, and the SMBus/I2C interface allows the SBC's OS to read port-status and battery-charging registers through /sys/class attributes.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho USB2513B-AEZC-TR — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | USB2513B-AEZC | USB2513BI-AEZG-TR | USB2513BT/M2 | USB2514B-AEZC-TR | USB2512B-AEZG-TR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 36-QFN (6x6 mm) | 36-QFN (6x6 mm) - same | 36-QFN (AEZG) - same footprint | 36-QFN (M2) - same footprint | 36-QFN (6x6 mm) - same | 36-QFN (AEZG) - same footprint |
| Downstream Ports | 3 | 3 | 3 | 3 | 4 (+33%) | 2 (-33%) |
| USB Speed | USB 2.0 Hi-Speed (480 Mbps) | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C (industrial) | Extended grade | -40 C to +85 C | -40 C to +85 C |
| Transaction Translator Topology | MultiTRAK (per-port TT) | MultiTRAK | MultiTRAK | MultiTRAK | MultiTRAK | MultiTRAK |
| Management Interface | SMBus / I2C | SMBus / I2C | SMBus / I2C | SMBus / I2C | SMBus / I2C | SMBus / I2C |
| Link Power Management (LPM) | Yes | Yes | Yes | Yes | Yes | Yes |
| Battery Charging Detection | Per-port BC1.2 inputs | Per-port BC1.2 | Per-port BC1.2 | Per-port BC1.2 | Per-port BC1.2 | Per-port BC1.2 |
Bảo phân biệt quan trọng
- MultiTRAK per-port transaction translators improve mixed-speed throughput (vsSingle-TT USB hub controllers (e.g., older USB2512 non-B))
- Integrated per-port BC1.2 battery-charging detection inputs (vsGeneric USB hub controllers without BC1.2 hardware inputs)
- USB 2.0 Link Power Management compliance for sub-1 mA suspend (vsNon-LPM USB 2.0 hub controllers)
- Same-family 3-/4-/2-port variants in identical 36-QFN footprint (vsUSB2514B-AEZC-TR and USB2512B-AEZG-TR)
Ghi chú thiết kế
Solder the exposed thermal pad (EP, pin 36) to a continuous, unbroken ground plane using at least 8 thermal vias in a 3x3 staggered array. This provides the primary heat dissipation path for the QFN-36 package and serves as the lowest-impedance signal return for the USB 2.0 DP/DM differential pairs. Estimate: thermal resistance theta_JA drops from approximately 60 C/W (no EP) to roughly 25 C/W (8-via EP soldered) per typical QFN design heuristics.
Route the USB 2.0 DP and DM traces as a 90-ohm differential pair (90 ohms +/-10%) with intra-pair length matching better than 150 mil, and keep the pair no longer than 50 mm to stay within the USB 2.0 Hi-Speed signal-integrity envelope. Place the 27-ohm series source termination resistors within 4 mm of the upstream port pins and the 15 kOhm pull-downs on each downstream DP line within 2 mm of the IC. Avoid routing DP/DM across any plane split - return-path discontinuities will fail USB-IF Hi-Speed compliance testing.
Decouple the VDD33 pin with a 4.7 uF X5R ceramic plus a 0.1 uF X7R ceramic placed within 2 mm of the pin; decouple VDD12 with a 1 uF X7R ceramic only. The internal charge pump that drives the downstream DP/DM high-side current sources draws up to 50 mA peak from VDD33 during enumeration; insufficient decoupling causes intermittent device-enumeration failures and USB-IF compliance margin loss. Estimate: at full enumeration worst case the device draws 60-80 mA from the 3.3 V rail.
Do not leave the RBIAS pin floating - it requires a 12.4 kOhm 1% resistor to GND to set the internal bias currents; missing or wrong-value RBIAS will cause the upstream port to fail USB-IF compliance. Do not assert RESET before the 3.3 V rail is stable; tie RESET to VDD33 through a 10 kOhm pull-up and a 1 nF cap if hardware reset is not needed. Avoid sharing I2C/SMBus address 0x2C with another device on the bus - this is the USB2513B-AEZC-TR default and is the most common cause of management-bus lockups in multi-device systems.
Add a common-mode choke (such as a 90-ohm @ 100 MHz part) in series with each downstream DP/DM pair if the receptacle is more than 25 mm from the IC, and consider a TVS array such as TPD2EUSB30 across each port for ESD compliance to IEC 61000-4-2 air-discharge. The upstream port also benefits from the same protection. Per Microchip reference designs, leaving DP/DM unfiltered on long external cables is a common cause of field returns from customer USB sticks.
Thông tin tuân thủ
RoHS and REACH compliant per Microchip product page. The standard -AEZC variant is not AEC-Q100 qualified; designers needing automotive qualification should evaluate the USB2513B-AEZG AEC-Q100 sibling. Lead-free and halogen-free per Microchip material declarations.
