10AS032H2F35E2SG vs 10AS032H2F35E1HG 比較
詳細並排比較 10AS032H2F35E2SG 由 Intel 與 10AS032H2F35E1HG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AS032H2F35E2SG | 10AS032H2F35E1HG |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | Arria 10 SX | — |
| Family | 10AS032 (F35 package) | — |
| Core Type | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 320K | 320,000 |
| Core Frequency | 1.5 GHz (HPS) | — |
| 封裝 | 1152-FCBGA, FC (35x35 mm) | 1152-ball FCBGA (35 x 35 mm) |
| 腳位數 | 1152 | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| Temperature Grade | E2 (industrial / extended) | — |
| Speed Grade | H2 | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| 供應電壓 | [DATA_NEEDED: core/IO/transceiver voltage] | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| DSP Blocks | Variable-precision hardened DSP blocks | — |
| Transceivers | Multi-gigabit transceivers (per Arria 10 family) | — |
| Hard Memory Controllers | DDR3/DDR4 hard controllers | — |
| PCI Express | Hard IP for PCIe Gen2/Gen3 | — |
| Embedded Memory | On-chip M20K + MLAB memory | — |
| RoHS 狀態 | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Process Technology | 20 nm | — |
| Design Tool | Intel Quartus Prime | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Operating Temperature Grade | — | Industrial (E1) |
| Process Node | — | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| Configuration | — | Serial (E1 suffix) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |