10AX115N4F40I3SG vs 10AX115R4F40I3SG 比較
詳細並排比較 10AX115N4F40I3SG 由 Intel 與 10AX115R4F40I3SG 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AX115N4F40I3SG | 10AX115R4F40I3SG |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | — |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory Bits | 68,857,856 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Hardened variable-precision DSP |
| Maximum User I/O | 600 | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | 17.4 Gbps | — |
| Process Node | 20 nm | — |
| 封裝 | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch | 1517-BBGA, FCBGA (F40) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| 工作溫度 | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Supply Voltage (Core) | [DATA_NEEDED: VCC core voltage] | — |
| Configuration | Serial, Parallel, and Avalon-ST supported | — |
| MSL 等級 | 3 (per JEDEC J-STD-020) | 3 |
| RoHS 狀態 | Compliant | — |
| Hardened IP | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) | — |
| Device Family Position | Mid-range 20 nm transceiver FPGA | — |
| Logic Elements | — | 1,150,000 |
| Embedded Memory | — | 68,857,600 bits |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| User I/O | — | 342 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Core Voltage | — | 0.9 V |
| Process Technology | — | 20 nm |
| Lead-Free / RoHS | — | Yes / Compliant |
| Configuration Memory | — | SRAM-based, volatile |