5CSEBA4U19A7N vs 5CSEBA5U19A7N 比較

詳細並排比較 5CSEBA4U19A7N 由 Intel 與 5CSEBA5U19A7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5CSEBA4U19A7N 5CSEBA5U19A7N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Hard Processor System Dual ARM Cortex-A9 MPCore with CoreSight —
Logic Elements 40 K 85,000
Adaptive Logic Modules [DATA_NEEDED: ALM count] —
Embedded Memory 3.4 Mbits (M9K) —
DSP Blocks (18x18 Multipliers) 224 —
PLLs [DATA_NEEDED: PLL count] —
HPS Maximum Application Clock 925 MHz —
Memory Interfaces DDR3, DDR3L, LPDDR2 (via HPS); soft DDR3/2 in FPGA —
User I/O 161 —
封裝 484-UBGA (U19), 19x19 mm, 1.0 mm pitch 484-pin UBG A (19x19 mm)
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
工作接面溫度 -40C to +125C (automotive) / -40C to +100C (industrial) —
Process Node TSMC 28 nm low-power —
Core Voltage 1.1 V (typical) —
RoHS 狀態 Compliant Compliant (per Ampheo listing)
MSL 等級 3 (168 hours) —
Process Technology — 28 nm low-power
Hard Processor System (HPS) — Dual ARM Cortex-A9 MPCore with CoreSight
HPS Maximum Frequency — 700 MHz
Supply Voltage (Core) — 1.1 V
Operating Temperature Grade — Automotive (AEC-Q100) -40C to +125C
I/O Count — 66 (per source listing)
Memory Interface — DDR3 controller in HPS; external memory interface in FPGA fabric
DSP Blocks — Variable-precision DSP blocks
Configuration / Boot Modes — NAND, QSPI, SD/MMC
Automotive Qualification — AEC-Q100 (Automotive grade, indicated by 'A' in part number)

資料表與資源

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