5CSEBA4U19I7SN vs 5CSEBA5U19I7SN 比較

詳細並排比較 5CSEBA4U19I7SN 由 Intel 與 5CSEBA5U19I7SN 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5CSEBA4U19I7SN 5CSEBA5U19I7SN
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Series Cyclone V SE SoC FPGA —
Device Family Cyclone V —
Logic Elements 40,000 85K
Hard Processor System (HPS) Single ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Frequency 800 MHz —
封裝 484-pin UBG A (19x19 mm) 484-pin UBG (Ultra FineLine BGA, 19x19 mm)
安裝類型 Surface Mount Surface Mount (BGA)
工作溫度 -40C to +100C (Industrial) —
Process Node 28 nm low-power —
Supply Voltage (Core) 1.1 V (typical) —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) —
Embedded Memory [DATA_NEEDED: total Kbits of M9K blocks] [DATA_NEEDED: total Kbits]
18x18 Hardware Multipliers [DATA_NEEDED: count] —
PLLs [DATA_NEEDED: count] —
Transceivers Not applicable (SE family, transceiver-less) [DATA_NEEDED: transceiver count for 5CSEA5 U19]
PCI Express Hard IP Gen1 capable (rootport/endpoint) —
DDR Memory Support DDR2/DDR3/LPDDR2 via HPS and FPGA fabric —
RoHS 狀態 Compliant Compliant
Family — Cyclone V SE SoC FPGA
Device Variant — 5CSEA5
Hard Processor System — Single-core ARM Cortex-A9 MPCore with CoreSight
HPS Maximum Clock — 800 MHz
FPGA Fabric Maximum Clock — [DATA_NEEDED: maximum fabric frequency]
Package Designator — U19
Speed/Logic Grade — A5 (mid-tier speed grade)
User I/O Count — 66 (per distributor listing); up to 288 in Cyclone V SE family typical
DSP Blocks — [DATA_NEEDED: DSP block count for 5CSEA5]
PLL Count — [DATA_NEEDED: PLL count for 5CSEA5]
工作接面溫度 — -40C to +100C (industrial)
Process Technology — TSMC 28 nm low-power
Configuration — SRAM-based, volatile
MSL 等級 — [DATA_NEEDED: moisture sensitivity level]

資料表與資源

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