5M160ZE64C5N vs 5M160ZM68A5N 比較
詳細並排比較 5M160ZE64C5N 由 Altera 與 5M160ZM68A5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M160ZE64C5N | 5M160ZM68A5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX V | — |
| Device Family | MAX V (5M160Z) | — |
| Logic Elements (LE) | 160 | — |
| Macrocells | 128 | 128 |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency (fMAX) | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 1.4 ns (per datasheet) | — |
| Configuration Memory | Non-volatile Flash | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| 封裝 | 64-pin EQFP (E64) with exposed pad | 68-ball FBGA (FineLine BGA), 0.5 mm pitch |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0°C to +85°C (commercial) | -40C to +125C (industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / In-system | IEEE Std 1149.1 JTAG BST |
| RoHS 狀態 | Compliant | Compliant |
| MSL 等級 | 3 | — |
| Family | — | MAX V |
| Device Variant | — | 5M160Z (128 macrocells, 1.8 V, speed grade -7) |
| Logic Array Blocks (LABs) | — | 4 |
| User I/Os | — | 52 |
| Propagation Delay (tPD) | — | 14 ns |
| Standby Current (ICCSTBY) | — | 25 uA (typical) |
| Core Supply Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| JEDEC Package Code | — | S-PBGA-B68 |
| Automotive Qualification | — | AEC-Q100 |