5M80ZT100C4N vs 5M80ZT100I5N 比較
詳細並排比較 5M80ZT100C4N 由 Intel 與 5M80ZT100I5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 5M80ZT100C4N | 5M80ZT100I5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX V | MAX V CPLD |
| Logic Elements (LEs) | 80 | — |
| Macrocells | 64 | — |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum User I/O Pins | 79 | — |
| Number of Global Clocks | 4 | — |
| User Flash Memory | 8 Kbit | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 封裝 | TQFP-100 (T100) | TQFP-100 (100 pins, 0.5 mm pitch) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to +85C (Commercial) | — |
| Process Technology | 0.18 µm flash CMOS | — |
| Configuration Method | Non-volatile flash (instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| RoHS 狀態 | Compliant | Compliant |
| Logic Elements (LE) | — | 80 |
| Macrocells (approx.) | — | 160 |
| User I/O Pins | — | 64 |
| Pin-to-Pin Logic Delay (tPD) | — | 7.5 ns |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Operating Temperature (Industrial) | — | -40 °C to +100 °C |
| Configuration Memory | — | Internal non-volatile flash (instant-on) |
| UFM (User Flash Memory) | — | Up to 8 Kbits user-accessible |
| JTAG / ISP | — | IEEE 1149.1 boundary-scan + in-system programming |
| MSL 等級 | — | MSL3 (per JEDEC J-STD-020) |