EP1810GC-35AB vs EP1810GI-45 比較
詳細並排比較 EP1810GC-35AB 由 Altera 與 EP1810GI-45 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1810GC-35AB | EP1810GI-45 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Family | Classic EPLD | — |
| Technology | CMOS EPROM | CMOS |
| Number of Macrocells | 48 | — |
| Number of Usable Gates | 1200 | — |
| Maximum Inputs | 64 | — |
| Maximum Outputs | 48 | — |
| Number of I/O Pins | 48 | — |
| Dedicated Input Pins | 12 | — |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Package Type | Pin Grid Array (PGA), ceramic | Ceramic Pin Grid Array with UV window |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Programming Method | UV-erasable EPROM, in-system via JTAG-like interface | — |
| RoHS 狀態 | unknown | Non-compliant (ceramic PGA) |
| Device Type | — | UV Erasable Programmable Logic Device (EPLD) |
| Family | — | Altera Classic EPLD |
| Macrocells | — | 24 |
| Flip-Flops | — | 48 |
| Propagation Delay (tpd) | — | 45 ns |
| Speed Grade | — | -45 |
| 腳位數 | — | 68 |
| 安裝類型 | — | Through-Hole |
| Programmable | — | Yes (UV-erasable, electrically programmable) |
| Lead-Free | — | No |
| 供應電壓 | — | [DATA_NEEDED: VCC range] |