EP1C20F400C7N vs EP1C20F400C6 比較
詳細並排比較 EP1C20F400C7N 由 Altera 與 EP1C20F400C6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1C20F400C7N | EP1C20F400C6 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Series | Cyclone | Cyclone |
| Family | Cyclone I | — |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | — |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | — |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | — |
| PLLs | 4 | 1 |
| Process Technology | 130 nm CMOS (SRAM-based) | 0.13 µm SRAM |
| Core Voltage | 1.5 V | — |
| Speed Grade | -7 (commercial, ~405 MHz internal) | 6 (commercial) |
| 工作溫度 | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (Commercial, C6 speed grade) |
| 封裝 | 400-ball FineLine BGA (FBGA) | 400-ball FineLine BGA (FBGA) |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| RoHS 狀態 | Compliant (per Altera product page) | [DATA_NEEDED: RoHS status of EP1C20F400C6 - pre-RoHS Altera parts typically non-compliant; needs explicit verification] |
| Logic Elements | — | 20,060 |
| Logic Array Blocks | — | 2,006 |
| Embedded RAM Bits | — | 294,912 bits (128 x 36-bit M4K blocks x 64) |
| Total RAM Blocks | — | 64 M4K blocks |
| Maximum User I/O | — | 301 |
| Core Voltage (VCCINT) | — | 1.5 V |
| Configuration Modes | — | Passive Serial, Active Serial, JTAG |
| LVDS Data Rate | — | Up to 311 Mbps |
| Design Software | — | Altera Quartus II / Intel Quartus Prime |