EP1C20F400C7N vs EP1C20F400C7 比較
詳細並排比較 EP1C20F400C7N 由 Altera 與 EP1C20F400C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1C20F400C7N | EP1C20F400C7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| 單價 (USD) | — | $48.90 |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | 2,006 |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | — |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | — |
| PLLs | 4 | 2 |
| Process Technology | 130 nm CMOS (SRAM-based) | 0.13 µm SRAM |
| Core Voltage | 1.5 V | 1.5 V |
| Speed Grade | -7 (commercial, ~405 MHz internal) | — |
| 工作溫度 | 0 °C to +85 °C (commercial) | 0°C to +85°C (commercial) |
| 封裝 | 400-ball FineLine BGA (FBGA) | 400-ball FineLine BGA (FBGA-400) |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | JTAG / Passive Serial / Passive Parallel |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| RoHS 狀態 | Compliant (per Altera product page) | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 20,060 LE |
| Embedded Memory | — | 294,912 bits (288 kbit) |
| M4K Memory Blocks | — | 64 |
| Maximum User I/O | — | 301 |
| Global Clock Networks | — | 20 |
| Package Dimensions | — | 21 mm × 21 mm |
| Ball Pitch | — | 1.00 mm |