EP1C6T144I6ES vs EP1C6T144C7N 比較
詳細並排比較 EP1C6T144I6ES 由 Intel 與 EP1C6T144C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1C6T144I6ES | EP1C6T144C7N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | Cyclone | Cyclone |
| Logic Elements (LEs) | 5,980 | — |
| Logic Array Blocks (LABs) | 598 (10 LEs per LAB) | — |
| Maximum Internal Frequency | 405 MHz | — |
| Total RAM Bits | 92,160 (approx 92 Kbits) | 92160 |
| Embedded Multipliers | 0 (not supported in this generation) | — |
| PLLs | 2 | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O for TQFP-144 variant] | — |
| 封裝 | TQFP-144 (22 x 22 mm, 0.5 mm pitch, gull-wing, lead-free) | 144-TQFP (TQFP-144) |
| Package Code (JEDEC) | LFQFP | — |
| Maximum Seated Height | 1.6 mm | — |
| Core Voltage | 1.5 V (typ) | — |
| 工作溫度範圍 | -40C to +100C (industrial, 'I' suffix) | — |
| Speed Grade | I6 (industrial, slowest grade) | — |
| Configuration Interface | JTAG, Passive Serial (PS), EPC configuration devices | — |
| Process Node | 0.13 um SRAM | — |
| Lead-Free / RoHS | Yes (lead-free, RoHS compliant per Verified Web Data) | — |
| Supported I/O Standards | LVTTL, LVCMOS, LVDS, SSTL-2, SSTL-3 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating not in Verified Web Data] | — |
| Series | — | Cyclone I |
| Manufacturer | — | Altera (Intel) |
| Logic Elements | — | 5980 |
| Logic Cells / CLBs | — | 5980 |
| Number of I/Os | — | 98 |
| Number of LABs/CLBs | — | 598 |
| Operating Voltage (Core) | — | 1.5 V |
| Operating Voltage (I/O) | — | 3.3 V (LVCMOS/LVTTL) |
| Maximum Operating Frequency | — | 320 MHz |
| Process Technology | — | CMOS, 130 nm |
| Number of PLLs | — | 2 |
| Package Size | — | 22 x 22 mm |
| Lead Pitch | — | 0.5 mm |
| 工作溫度 | — | 0C to +85C (commercial) |
| Configuration Modes | — | PS, AS, JTAG |
| RoHS 狀態 | — | Compliant |