EP1K100QI208-02 vs EP1K100QI208-2N 比較

詳細並排比較 EP1K100QI208-02 由 Altera 與 EP1K100QI208-2N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1K100QI208-02 EP1K100QI208-2N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family ACEX-1K —
Logic Elements 4,992 —
System Gates 100,000 257000
Logic Array Blocks (LABs) 624 —
Embedded Memory (RAM bits) 49,152 —
Maximum User I/O Pins 147 —
Process Technology 0.22 µm SRAM —
Core Voltage 2.5 V —
Speed Grade -02 (slowest) -2
Maximum Frequency 250 MHz —
封裝 208-BFQFP (PQFP, gull-wing) —
安裝類型 Surface Mount Surface Mount
Configuration Method SRAM-based, serial/parallel/JTAG —
MultiVolt I/O Support 2.5 V / 3.3 V / 5 V —
工作溫度 -40°C to +85°C (industrial) —
RoHS 狀態 Unknown (legacy family) [DATA_NEEDED: manufacturer RoHS certificate]
Lead-Free Unknown —
Series — ACEX-1K
FPGA Family — ACEX-1K
Number of Logic Elements/Cells — 4992
Number of LABs/CLBs — 624
Total RAM Bits — 49152
Number of User I/O — 147
封裝 / 外殼 — 208-BFQFP
Core Supply Voltage — 2.5 V
Temperature Grade — I (industrial)
Typical Gate Count — 100K gates (family)
工作溫度範圍 — [DATA_NEEDED: exact industrial temperature limits from ACEX-1K datasheet]
Max User I/O in 208-BFQFP — 147
Total Number of Configuration Bits — [DATA_NEEDED: configuration bitstream size]
Maximum Internal Clock Frequency — [DATA_NEEDED: clock frequency for -2 speed grade]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
PLL/Clock Management — [DATA_NEEDED: PLL availability on EP1K100]

資料表與資源

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