EP1K10TC100-2N vs EP1K10TC100-1N 比較
詳細並排比較 EP1K10TC100-2N 由 Altera 與 EP1K10TC100-1N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1K10TC100-2N | EP1K10TC100-1N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | ACEX-1K | ACEX-1K |
| Logic Elements / Cells | 576 | 576 |
| Typical Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 72 | 72 |
| Embedded Memory (EAB) | 12,288 bits | — |
| Maximum User I/O | 66 | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS SRAM |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5 V | — |
| Speed Grade | -2 | -1N (commercial, slower tier) |
| Maximum Frequency | 200 MHz | — |
| 封裝 | 100-pin TQFP (1.0 mm body, 0.5 mm pitch) | 100-pin TQFP (14 mm x 14 mm, 1 mm height) |
| 工作溫度 | 0 C to +70 C (commercial) | 0 °C to 70 °C (commercial) |
| Configuration Modes | Passive Serial, Active Serial, JTAG | — |
| 安裝類型 | Surface Mount | Surface Mount (gull-wing) |
| RoHS 狀態 | Lead-free / RoHS compliant | Compliant |
| Series | — | EP1K10 |
| Total Gates (typical) | — | 10,000 |
| Embedded RAM Bits | — | 12,288 bits |
| Embedded Array Blocks (EABs) | — | 3 x 4 Kbit |
| User I/Os | — | 66 |
| Core Supply Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Configuration Method | — | SRAM (external PROM required) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |