EP1K30TC144-3N vs EP1K30TC144-3 比較
詳細並排比較 EP1K30TC144-3N 由 Intel 與 EP1K30TC144-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1K30TC144-3N | EP1K30TC144-3 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Series | ACEX-1K | ACEX-1K |
| Family | ACEX-1K® Field Programmable Gate Array | — |
| Typical Gates | 30,000 | 30,000 |
| Logic Elements (LE) | 1,728 | — |
| Logic Array Blocks (LAB) | 216 | — |
| Embedded Array Blocks (EAB) | 6 | — |
| Total RAM Bits | 24,576 | 24,576 |
| User I/O Pins | 102 | — |
| Process Technology | 0.22 µm CMOS (SRAM-based) | 0.22 µm SRAM |
| Core Supply Voltage | 2.5 V | — |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -3 (slowest tier of ACEX-1K) | -3 (slowest speed bin) |
| 封裝 | 144-pin LQFP (TQFP) 22x22 mm | 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch) |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration | SRAM, in-system programmable via serial / JTAG | — |
| RoHS 狀態 | Unknown (legacy part - verify with distributor) | [DATA_NEEDED: rohs status from datasheet] |
| Logic Elements / Cells | — | 1,728 |
| Number of LABs/CLBs | — | 216 |
| Maximum System Gates | — | 56,000 |
| Number of User I/O | — | 102 |
| Number of Logic Array Blocks | — | 216 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Voltage Standard | — | 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant) |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Configuration Method | — | Serial configuration device (EPC2/EPC8 compatible) |
| Boundary Scan | — | IEEE 1149.1 JTAG compliant |
| Number of Global Clocks | — | 8 |