EP1K50FC256-2 vs EP1K50XXB 比較

詳細並排比較 EP1K50FC256-2 由 Altera 與 EP1K50XXB 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1K50FC256-2 EP1K50XXB
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series ACEX-1K —
Family ACEX 1K Family ACEX-1K
Logic Cells / Elements 2,880 —
Typical Gates 50,000 50,000
Number of LABs/CLBs 360 —
User I/Os 186 —
Total RAM Bits 40,960 —
Number of Gates 50,000 —
Voltage - Supply 2.375 V to 2.625 V (nominal 2.5 V) —
Process Technology 0.22 µm CMOS 0.18 um SRAM
Propagation Delay 0.4 ns (per Partstack listing) —
工作溫度 0°C to +70°C (commercial) Commercial 0C to +70C / Industrial -40C to +85C
封裝 / 外殼 256-BGA (FineLine BGA, 17x17 mm) —
安裝類型 Surface Mount —
安裝方式 SMD/SMT —
Programming Type In-System Programmable via JTAG (IEEE 1149.1) —
Configuration Method SRAM-based, volatile configuration Serial configuration device or JTAG
RoHS 狀態 Compliant Compliant (lead-free variants available)
REACH Status Compliant —
MSL 等級 [DATA_NEEDED: MSL level] —
Manufacturer — Intel (formerly Altera)
Logic Elements (LEs) — 2,880
Embedded System RAM Bits — 40,960
Embedded Array Blocks (EABs) — 10 (each 4 Kbit, configurable as RAM/ROM)
Maximum User I/O — [DATA_NEEDED: depends on package variant]
Core Supply Voltage — 2.5 V
I/O Supply Voltage — 3.3 V / 2.5 V / 1.8 V (multi-voltage)
In-System Programmability — Yes, via JTAG (IEEE 1149.1)
Package Type — [DATA_NEEDED: depends on MPN suffix]
生命週期狀態 — Obsolete (NRND on legacy Altera roadmap)

資料表與資源

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