EP1K50XXB vs EP1K50TI144-2 比較

詳細並排比較 EP1K50XXB 由 Intel 與 EP1K50TI144-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1K50XXB EP1K50TI144-2
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family ACEX-1K ACEX-1K
Manufacturer Intel (formerly Altera) —
Process Technology 0.18 um SRAM SRAM-based, 0.18 µm
Typical Gates 50,000 50,000
Logic Elements (LEs) 2,880 2,880
Embedded System RAM Bits 40,960 —
Embedded Array Blocks (EABs) 10 (each 4 Kbit, configurable as RAM/ROM) [DATA_NEEDED: EAB count]
Maximum User I/O [DATA_NEEDED: depends on package variant] 102
Core Supply Voltage 2.5 V —
I/O Supply Voltage 3.3 V / 2.5 V / 1.8 V (multi-voltage) —
In-System Programmability Yes, via JTAG (IEEE 1149.1) —
Configuration Method Serial configuration device or JTAG Passive Serial / Passive Parallel / JTAG
工作溫度 Commercial 0C to +70C / Industrial -40C to +85C -40 °C to +85 °C (Industrial)
Package Type [DATA_NEEDED: depends on MPN suffix] —
RoHS 狀態 Compliant (lead-free variants available) [DATA_NEEDED: RoHS compliance]
生命週期狀態 Obsolete (NRND on legacy Altera roadmap) —
Logic Array Blocks (LABs) — 360
Total RAM Bits — 40,960
Core Supply Voltage (VCCINT) — 2.5 V (2.375 V to 2.625 V)
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO range]
Speed Grade — -2
封裝 — 144-LQFP (TQFP-144)
安裝類型 — Surface Mount
JTAG Support — IEEE 1149.1 Boundary Scan
MSL 等級 — [DATA_NEEDED: MSL rating]

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