EP1M120B484C8A vs EP1M120B484C5 比較
詳細並排比較 EP1M120B484C8A 由 Altera 與 EP1M120B484C5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1M120B484C8A | EP1M120B484C5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Mercury (EP1M) | Mercury (EP1M) |
| Logic Elements (approx.) | 120 | — |
| 封裝 | 484-ball FineLine BGA | FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch) |
| 腳位數 | 484 | — |
| Speed Grade | 8 | 5 (slowest) |
| Temperature Grade | Commercial (C) | — |
| 工作溫度 | [DATA_NEEDED: full range] | 0C to +85C (commercial) |
| Peak Reflow Temperature | 220 C (per JEDEC J-STD-020) | 220 C |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Logic Blocks | [DATA_NEEDED: LAB count] | — |
| Embedded Memory | [DATA_NEEDED: RAM bits] | — |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | 303 |
| Supply Voltage Core | [DATA_NEEDED: VCCINT] | — |
| Supply Voltage I/O | [DATA_NEEDED: VCCIO] | — |
| Configuration Method | [DATA_NEEDED: SRAM/serial/etc.] | — |
| RoHS 狀態 | [DATA_NEEDED: check distributor] | — |
| MSL 等級 | [DATA_NEEDED: per JEDEC J-STD-020] | — |
| Logic Elements | — | 4,800 |
| Typical Gates | — | 120,000 |
| Core Voltage | — | 1.8 V |
| Process Technology | — | 0.18 um CMOS |
| PLLs | — | 4 |
| Embedded RAM Bits | — | 49,152 |
| True LVDS Channels | — | Up to 34 pairs |
| Maximum LVDS Data Rate | — | 840 Mbps per channel |
| Configuration Scheme | — | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG |
| Lead-Free / RoHS | — | SnPb ball finish (non-RoHS by default) |
| Multipliers | — | Embedded in system blocks for DSP |