EP1S10F484I6N vs EP1S10F484C5N 比較
詳細並排比較 EP1S10F484I6N 由 Intel 與 EP1S10F484C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S10F484I6N | EP1S10F484C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | Stratix | Stratix (original) |
| Logic Elements | 10,570 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Logic Array Blocks (LABs) | 1,057 | 1,057 |
| Embedded Memory (Bits) | 920,448 | — |
| DSP Blocks | 48 | — |
| Maximum User I/O | 335 | 335 |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| Number of PLLs | 6 | — |
| 工作溫度 | 0C to +85C (Industrial) | — |
| 封裝 | 484-ball FBGA (FCBGA), 23 x 23 mm, 1 mm pitch | 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch |
| 安裝類型 | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Peak Reflow Temperature | 245 C | — |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Active Serial | — |
| Internal Core Speed | up to 450 MHz | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | — |
| Logic Family | CMOS | — |
| Terminal Finish | Tin-Silver-Copper (SnAgCu) | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 10,570 |
| Embedded Memory Bits | — | 920,448 |
| TriMatrix Memory Blocks | — | 14 |
| Embedded DSP Blocks | — | 6 (≈48 9-bit multipliers) |
| PLLs | — | 4 |
| Global Clock Networks | — | 12 |
| User I/O Standard Support | — | LVDS, LVPECL, PCI-X, RapidIO, DDR |
| Maximum Internal Frequency | — | 500 MHz (per Stratix datasheet) |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (Commercial) |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Device Status | — | Obsolete - last time buy completed |
| Design Toolchain | — | Quartus II (≤ v13.0) |