EP1S20F672C7N vs EP1S20B672C7N 比較

詳細並排比較 EP1S20F672C7N 由 Intel 與 EP1S20B672C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1S20F672C7N EP1S20B672C7N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series Stratix (first generation) Stratix
Family Stratix Stratix (original)
Logic Elements (LEs) 18,460 18,460
Logic Cells 18,460 —
Configurable Logic Blocks (CLBs) 2,132 —
Embedded Memory (TriMatrix) 1,669,248 bits (426 Kbit total) —
DSP Blocks 56 (dedicated 18x18 multipliers) —
Maximum User I/O 586 426
I/O Banks [DATA_NEEDED: I/O bank count] —
PLLs Up to 12 —
Maximum Operating Frequency 420.17 MHz —
Core Voltage 1.5 V —
Process Technology 130 nm CMOS 0.13 µm CMOS
封裝 672-FBGA (FineLine BGA) —
Package Body Size 35 mm x 35 mm —
Ball Pitch 1.27 mm —
工作溫度 0°C to +85°C (commercial) 0 °C to 85 °C (Commercial Extended)
Speed Grade C7 (-7) -7
安裝類型 Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Yes (lead-free finish, RoHS compliant) —
Configuration Modes PS, PPS, FPP, JTAG —
MSL 等級 [DATA_NEEDED: moisture sensitivity level] 3 (per JEDEC J-STD-020)
LABs / CLBs — 1,846
Embedded Memory Bits — 1,669,248 bits
Number of Pins / Balls — 672
Package Type — 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch)
Supply Voltage (Core, VCCINT) — 1.5 V
Logic Family — CMOS
RoHS 狀態 — [DATA_NEEDED: RoHS compliance]
Lead-Free — [DATA_NEEDED: lead-free status]

資料表與資源

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