EP1S25F1020C6N vs EP1S25F1020I6 比較
詳細並排比較 EP1S25F1020C6N 由 Altera 與 EP1S25F1020I6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S25F1020C6N | EP1S25F1020I6 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements (LE) | 25,660 | — |
| Logic Cells | 25,660 | — |
| Embedded Memory (bits) | 1,944,576 | — |
| User I/O Pins | 706 | — |
| LABs (Logic Array Blocks) | 2,566 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| 封裝 | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| 工作溫度 | 0C to +85C (Commercial) | -40 °C to +85 °C (industrial) |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs compliance per lot] |
| Configuration Method | JTAG or EPC configuration device | — |
| Family Generation | Stratix (1st generation) | — |
| Series | — | Stratix I |
| Logic Elements (LEs) | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| Embedded Memory (RAM bits) | — | 1,944,576 bits (≈ 1.85 Mbits) |
| Maximum User I/O | — | 706 |
| Maximum Operating Frequency | — | 450 MHz (per datasheet reference) |
| Core Supply Voltage | — | 1.5 V |
| Configuration | — | Passive serial, fast passive parallel, JTAG, enhanced configuration device |
| On-chip PLL | — | Yes |
| DSP Blocks | — | Yes (Stratix DSP blocks) |