EP1S30B956C6 vs EP1S60B956C6 比較
詳細並排比較 EP1S30B956C6 由 Altera 與 EP1S60B956C6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S30B956C6 | EP1S60B956C6 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix | — |
| Logic Elements (LEs) | 32,470 | — |
| Logic Array Blocks (LABs) | 3,247 | — |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | — |
| Maximum User I/O | 683 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| 工作溫度 | 0 C to 85 C (Commercial) | 0 C to +85 C (Commercial) |
| Speed Grade | C6 | — |
| 封裝 | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-BBGA, FCBGA (40 x 40 mm) |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | — |
| DSP Blocks | Yes (Stratix DSP blocks) | — |
| PLLs | Up to 12 | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | — |
| RoHS 狀態 | Not confirmed - pre-RoHS part | [DATA_NEEDED: RoHS status] |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Lead-Free | Unknown | — |
| Series | — | Stratix (EP1S) |
| Logic Elements | — | 57,120 |
| Total RAM Bits | — | 5,215,104 |
| Number of LABs/CLBs | — | 5712 |
| Number of I/O | — | 683 |
| Supplier Device Package | — | 956-BGA (40x40) |
| Core Voltage - Supply | — | 1.425 V to 1.575 V |
| Voltage - Supply | — | 1.425 V to 1.575 V |
| 腳位數 | — | 956 |
| Form of Terminal | — | Ball (BGA) |
| Package Code | — | BGA / FCBGA |