EP1S30F780I6N vs EP1S40F780I6N 比較

詳細並排比較 EP1S30F780I6N 由 Intel 與 EP1S40F780I6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP1S30F780I6N EP1S30F780I6N - Stratix FPGA, 32.5K LE, 780-BGA | Intel / Altera

EP1S30F780I6N - Stratix FPGA, 32.5K LE, 780-BGA | Intel / Altera

EP1S30F780I6N ⚠ 最後購買機會

規格比較

參數 EP1S30F780I6N EP1S40F780I6N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family Stratix —
Logic Elements 32,470 41,250
Total RAM Bits 3,317,184 bits 3,423,744
User I/O Count 597 —
Package Type 780-BBGA, FCBGA (FineLine BGA) —
工作溫度 -40C to +100C (Industrial, I6) -40C to +100C (industrial)
Process Technology 130 nm —
Supply Voltage (Core) [DATA_NEEDED: core voltage] —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL —
Lead-Free / RoHS Lead-free terminal finish (N suffix), RoHS-compliant —
Speed Grade -6 —
DSP Blocks Yes (TriMatrix + DSP blocks per Stratix family) 12
安裝類型 Surface Mount Surface Mount
MSL 等級 3 (per typical FBGA moisture sensitivity) 3
JEDEC Code (e1) e1 (Pb-free / matte tin) —
Series — Stratix
Logic Array Blocks (LABs) — 4,125
User I/O Pins — 615
Core Voltage (VCCINT) — 1.425 V to 1.575 V
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
PLLs — [DATA_NEEDED: PLL count per Stratix handbook]
Embedded Multipliers — Yes (per DSP block)
Configuration Method — SRAM-based, volatile
封裝 — 780-FBGA (29 x 29 mm, 1.0 mm pitch)
Lead Free — Yes
Process Node — 150 nm CMOS
RoHS 狀態 — Compliant

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