EP1S60F1020C7 vs EP1SGX25FF1020C7ES 比較
詳細並排比較 EP1S60F1020C7 由 Altera 與 EP1SGX25FF1020C7ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX25FF1020C7ES - Stratix GX FPGA 25K LE FC-FBGA-1020 | Altera
EP1SGX25FF1020C7ES Obsolete規格比較
| 參數 | EP1S60F1020C7 | EP1SGX25FF1020C7ES |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | Stratix | — |
| Family | Stratix (EP1S60) | Stratix GX |
| Logic Elements | 57,120 | 25,660 |
| Total Memory Bits | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| 封裝 | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch | — |
| 安裝類型 | Surface Mount | — |
| Logic Family | CMOS | — |
| 工作溫度 | 0C to +85C (Commercial) | 0 C to 85 C |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Speed Grade | 7 | C7 |
| Logic Cells / Logic Blocks | 6,570 (per datasheet Section I nomenclature) | — |
| DSP Blocks | Embedded dedicated multiplier / adder blocks | Yes (dedicated hardware multipliers) |
| PLLs | Up to 12 enhanced PLLs per die | — |
| Configuration Method | Serial or parallel with optional decompression | — |
| MSL 等級 | 3 (per BGA moisture-sensitivity norms) | — |
| RoHS 狀態 | Compliant (lead-free) | [DATA_NEEDED: RoHS compliance] |
| Logic Array Blocks (LABs) | — | 2,566 |
| User I/Os | — | 607 |
| Process Technology | — | 130 nm CMOS |
| Package Type | — | FC-FBGA-1020 |
| Package Size | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Configuration Memory | — | SRAM (external configuration device required) |
| Embedded Transceivers | — | Yes (multi-gigabit serial channels) |
| Embedded Memory | — | TriMatrix memory blocks |
| Lead Free | — | Yes |