EP1S80F1020I7NGA vs EP1S80F1020C7 比較

詳細並排比較 EP1S80F1020I7NGA 由 Intel 與 EP1S80F1020C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1S80F1020I7NGA EP1S80F1020C7
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Stratix (EP1S) —
Logic Elements 79,040 79,040
Total Memory Bits 7,427,520 bits —
DSP Blocks 22 Dedicated hardware multipliers/accumulators
Embedded Transceivers 12 channels (600 Mbps to 3.1875 Gbps) —
Maximum User I/O 773 —
封裝 1020-ball FineLine BGA (33 × 33 mm, 1.00 mm pitch) —
Process Node 0.13 µm CMOS —
工作溫度 -40 °C to +100 °C (Industrial) 0 C to 85 C (Commercial)
Supply Voltage (Core) 1.5 V —
I/O Standards Supported LVTTL, LVCMOS, SSTL, LVDS, LVPECL, PCI, PCI-X, HSTL, LVDS, HyperTransport —
最大時脈頻率 Up to 420 MHz (device-dependent) —
PLL Count 12 (enhanced PLLs and fast PLLs) —
Configuration Method JTAG, EPC16/EPC8 serial or parallel configuration device, passive/active serial —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 Compliant Compliant (lead-free FBGA)
Lead-Free Yes —
濕度敏感等級 (MSL) 3 (per JEDEC J-STD-020) —
Series — Stratix
System Gates (typical) — 7,427,520
Logic Array Blocks (LABs) — 7,904
User I/O Pins — 773
Total Package Pins — 1020 (ball)
Package Type — FBGA-1020 (33 x 33 mm, 1 mm pitch)
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V
Logic Family — CMOS, SRAM-based configuration
Process Technology — 1.5 V, 0.13 um CMOS
Configuration Modes — Passive Serial (PS), Fast Passive Parallel (FPP), JTAG
PLLs — 12 (per datasheet family)
Memory — TriMatrix embedded SRAM blocks

資料表與資源

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