EP1SGX25DF672I6N vs EP1SGX25DF800I6N 比較
詳細並排比較 EP1SGX25DF672I6N 由 Intel 與 EP1SGX25DF800I6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP1SGX25DF800I6N - Stratix GX FPGA, 25K LE, 20x 3.1875 Gbps Transceivers | Intel / Altera
EP1SGX25DF800I6N ⚠ 最後購買機會規格比較
| 參數 | EP1SGX25DF672I6N | EP1SGX25DF800I6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix GX | — |
| Logic Elements / Cells | 25,660 | — |
| Logic Array Blocks (LABs) | 2566 | — |
| User I/O Pins | 455 | — |
| Supply Voltage - Core | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| 工作溫度 | 0C to 85C (Industrial) | — |
| 封裝 / 外殼 | 672-BBGA, FCBGA | — |
| Supplier Device Package | 672-FBGA (27x27) | — |
| Package Dimensions | 33 x 33 mm, 1 mm pitch | — |
| 安裝類型 | Surface Mount | — |
| Lead Free / RoHS | Lead Free, RoHS Compliant | — |
| Logic Family | CMOS | — |
| Internal Clock Speed | 5000 MHz | — |
| Transceivers | [DATA_NEEDED: number of channels] | — |
| Process Technology | 1.5V CMOS | — |
| Family | — | Stratix GX |
| Logic Elements | — | [DATA_NEEDED: logic element count] |
| Transceiver Channels | — | 4 to 20 channels |
| Maximum Transceiver Data Rate | — | 3.1875 Gbps per channel |
| CDR / SERDES | — | Embedded clock-data recovery and SERDES |
| Memory | — | TriMatrix memory, up to 2 Mbits |
| DSP Blocks | — | Up to 22 DSP blocks |
| Hard IP | — | PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) |
| Source-Synchronous Channels | — | 8 channels |
| I/O Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| 封裝 | — | 800-pin FineLine BGA (DF800) |
| Speed Grade | — | -6 (production grade) |
| Temperature Range | — | Industrial -40C to +100C |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Protocol Support | — | Gigabit Ethernet, SONET/SDH, PCI Express, custom serial |