EP1SGX40DF1020I5 vs EP1SGX40G 比較

詳細並排比較 EP1SGX40DF1020I5 由 Altera 與 EP1SGX40G 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX40DF1020I5 EP1SGX40G
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family Stratix GX Stratix GX
Device Series EP1SGX40 —
Logic Elements 41,250 41,250
Configurable Logic Blocks (CLBs) 4,125 —
Process Technology 130 nm CMOS [DATA_NEEDED: process node]
Core Voltage (Nominal) 1.5 V —
Supply Voltage Range 1.425 V to 1.575 V —
Operating Temperature Grade Industrial / Military (-40C to +100C) —
Speed Grade I5 —
封裝 1020-ball FC-FBGA 1020-pin FineLine BGA
Terminal Pitch 1.00 mm —
安裝類型 Surface Mount —
Embedded Transceivers [DATA_NEEDED: transceiver count and max data rate] —
On-chip Memory [DATA_NEEDED: TriMatrix memory total bits] —
DSP Blocks [DATA_NEEDED: number of DSP blocks] [DATA_NEEDED: DSP block count]
Toolchain Support Quartus II / Quartus Prime —
RoHS 狀態 [DATA_NEEDED: explicit RoHS marking] [DATA_NEEDED: RoHS compliance]
Lead-Free yes (per Altera ordering info) —
Total RAM Bits — 3,423,744
Maximum User I/O Pins — 624
Number of Transceivers — 20
Maximum Transceiver Data Rate — 3.1875 Gbps
Minimum Transceiver Data Rate — 500 Mbps
Transceiver Channels per Bank — 4
Supported Serial Standards — PCI Express, XAUI, Serial RapidIO, SerialLite II
8B/10B Encoder/Decoder — Hardware (dedicated per channel)
PLLs — [DATA_NEEDED: PLL count]
Speed Grades Available — C5, C6, C7, I5, I6, I7
Operating Temperature Range (Commercial) — 0C to +85C
Operating Temperature Range (Industrial) — -40C to +100C
Configuration Method — EPC enhanced configuration devices, JTAG
Vertical Migration — Supported within 1020-pin FineLine BGA package (EP1SGX25/EP1SGX40)

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