EP1SGX40FF1020C7 vs EP1SGX40FF1020I5 比較
詳細並排比較 EP1SGX40FF1020C7 由 Altera 與 EP1SGX40FF1020I5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1SGX40FF1020C7 | EP1SGX40FF1020I5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Series | Stratix GX | — |
| Family | Stratix GX (EP1SGX40) | Stratix GX |
| Logic Elements (LE) | 41,250 | — |
| Configurable Logic Blocks (CLB) | 4,125 | — |
| Embedded Memory (bits) | 3,423,744 | — |
| User I/O Pins | 624 | — |
| Number of Logic Array Blocks (LAB) | 4,125 | — |
| Number of I/O Banks | 12 | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| Speed Grade | 7 (-7, mid-speed) | I5 |
| Process Technology | CMOS | 130 nm CMOS |
| 工作溫度 | 0 °C to 85 °C (commercial) | -40C to +100C (Industrial) |
| 封裝 | 1020-ball FC-FBGA (S-PBGA-B1020) | 1020-ball FineLine BGA (FF1020) |
| Package Dimensions | 33 mm × 33 mm | — |
| Ball Pitch | 1.00 mm | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| RoHS 狀態 | Compliant | [DATA_NEEDED: RoHS status] |
| Configuration Modes | PS, PPS, PPA, JTAG, AS | — |
| DSP Blocks (9-bit) | 176 | — |
| Transceiver Channels | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps | — |
| PLLs | 8 enhanced + per-transceiver PLLs | — |
| Logic Elements (LEs) | — | 41,250 |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Configuration | — | SRAM-based LUT |
| Nominal Core Supply Voltage | — | 1.5 V |
| Terminal Pitch | — | 1.00 mm |
| Package Shape | — | Square |
| Logic Family | — | CMOS |
| Hardened Transceivers | — | 3.125 Gbps multi-channel (per Stratix GX family) |