EP20K100CB356C7 vs EP20K200CB356C7N 比較

詳細並排比較 EP20K100CB356C7 由 Intel 與 EP20K200CB356C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP20K100CB356C7 EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel

EP20K100CB356C7 - APEX20K FPGA 100K Gates 252 I/O 356-BGA | Intel

EP20K100CB356C7 ⚠ 最後購買機會

規格比較

參數 EP20K100CB356C7 EP20K200CB356C7N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Manufacturer Intel (formerly Altera) —
Series APEX20K EP20K200
Typical Gates 100,000 —
Maximum Logic Elements 53,248 —
User I/O Pins 252 —
封裝 356-LBGA 356-ball PBGA (S-PBGA)
Embedded Memory (Bits) 53,248 —
Number of PLLs 4 —
Core Voltage 2.5 V —
I/O Standards Supported 1.8V, 2.5V, 3.3V, 5V (MultiVolt) —
Programming Interface IEEE 1149.1 JTAG —
Process Technology 0.18 μm CMOS 0.15 um CMOS
工作溫度 Commercial grade 0C to +85C (Commercial)
Speed Grade C7 —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] unknown
Family — APEX 20KC
System Gates — 200,000
Logic Elements / Cells — 8,320
Maximum Operating Frequency — 3571.6 MHz (internal equivalent)
Propagation Delay — 1.48 ns
User I/Os — 263
Input Terminals — 267
Supply Voltage (Nominal) — 1.8 V
安裝類型 — Surface Mount
Embedded Memory — ESBs (dual-port RAM/ROM/FIFO)
Clock Management — PLL with up to 4 outputs
JTAG Support — Yes (IEEE 1149.1)
In-System Programmable — Yes

資料表與資源

瀏覽所有產品 建立 BOM 索取報價